Dual N & P-Channel Enhancement Mode Field Effect Transistor
These dual N- and P -Channel enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very high
density process is especially tailored to minimize on-state
resistance and provide superior switching performance. These
devices are particularly suited for low voltage applications such
as notebook computer power management and other battery
powered circuits where fast switching, low in-line power loss,
and resistance to transients are needed.
N-Channel 5.5A, 20V, RDS(ON)=0.035Ω @ VGS=4.5V
RDS(ON)=0.045Ω @ VGS=2.7V
P-Channel -3.8A, -20V, RDS(ON)=0.07Ω @ VGS=-4.5V
RDS(ON)=0.1Ω @ VGS=-2.7V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
Dual (N & P-Channel) MOSFET in surface mount package.
Absolute Maximum Ratings
TA= 25°C unless otherwise noted
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
PD Power Dissipation for Dual Operation
Power Dissipation for Single Operation
TJ,TSTG Operating and Storage Temperature Range
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
-55 to 150
© 1997 Fairchild Semiconductor Corporation