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90S2343 Dataheets PDF



Part Number 90S2343
Manufacturers ATMEL Corporation
Logo ATMEL Corporation
Description 8-Bit Microcontroller with 2K Bytes of In-System Programmable Flash
Datasheet 90S2343 Datasheet90S2343 Datasheet (PDF)

Features • • • • • • • • • • • • • • • • • • • • Utilizes the AVR ® Enhanced RISC Architecture AVR - High Performance and Low Power RISC Architecture 118 Powerful Instructions - Most Single Clock Cycle Execution 2K bytes of In-System Programmable ISP Flash – SPI Serial Interface for In-System Programming – Endurance: 1,000 Write/Erase Cycles 128 bytes EEPROM – Endurance: 100,000 Write/Erase Cycles 128 bytes Internal RAM 32 x 8 General Purpose Working Registers – 3 AT90S/LS2323 Programmable I/O L.

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Features • • • • • • • • • • • • • • • • • • • • Utilizes the AVR ® Enhanced RISC Architecture AVR - High Performance and Low Power RISC Architecture 118 Powerful Instructions - Most Single Clock Cycle Execution 2K bytes of In-System Programmable ISP Flash – SPI Serial Interface for In-System Programming – Endurance: 1,000 Write/Erase Cycles 128 bytes EEPROM – Endurance: 100,000 Write/Erase Cycles 128 bytes Internal RAM 32 x 8 General Purpose Working Registers – 3 AT90S/LS2323 Programmable I/O Lines – 5 AT90S/LS2343 Programmable I/O Lines VCC: 4.0 - 6.0V AT90S2323/AT90S2343 VCC: 2.7 - 6.0V AT90LS2323/AT90LS2343 Power-On Reset Circuit Speed Grades: 0 - 10 MHz AT90S2323/AT90S2343 Speed Grades: 0 - 4 MHz AT90LS2323/AT90LS2343 Up to 10 MIPS Throughput at 10 MHz One 8-Bit Timer/Counter with Separate Prescaler External and Internal Interrupt Sources Programmable Watchdog Timer with On-Chip Oscillator Low Power Idle and Power Down Modes Programming Lock for Flash Program and EEPROM Data Security Selectable On-Chip RC Oscillator 8-Pin Device 8-Bit Microcontroller with 2K Bytes of In-System Programmable Flash AT90S2323 AT90LS2323 AT90S2343 AT90LS2343 Preliminary AT90S/LS2323 Description The AT90S/LS2323 and AT90S/LS2343 is a low-power CMOS 8-bit microcontrollers based on the AVR ® enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the AT90S/LS2323 and AT90S/LS2343 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. Pin Configuration PDIP/SOIC RESET (CLOCK) PB3 PB4 GND 1 2 3 4 8 7 6 5 VCC RESET PB2 (SCK/T0) XTAL1 PB1 (MISO/INT0) XTAL2 PB0 (MOSI) GND 1 2 3 4 8 7 6 5 VCC PB2 (SCK/T0) PB1 (MISO/INT0) PB0 (MOSI) AT90S/LS2343 AT90S/LS2323 Rev. 1004AS–05/98 Note: This is a summary document. For the complete 34 page document, please visit our website at www.atmel.com or e-mail at [email protected] and request literature #1004A. 1 Block Diagram Figure 1. The AT90S/LS2343 Block Diagram VCC 8-BIT DATA BUS INTERNAL OSCILLATOR GND PROGRAM COUNTER STACK POINTER WATCHDOG TIMER TIMING AND CONTROL RESET PROGRAM FLASH SRAM MCU CONTROL REGISTER INSTRUCTION REGISTER GENERAL PURPOSE REGISTERS X Y Z TIMER/ COUNTER INSTRUCTION DECODER INTERRUPT UNIT CONTROL LINES ALU EEPROM STATUS REGISTER PROGRAMMING LOGIC SPI OSCILLATOR DATA REGISTER PORTB DATA DIR. REG. PORTB PORTB DRIVERS PB0 - PB4 2 AT90S/LS2323 and AT90S/LS2343 AT90S/LS2323 and AT90S/LS2343 Figure 2. The AT90S/LS2323 Block Diagram VCC 8-BIT DATA BUS INTERNAL OSCILLATOR GND PROGRAM COUNTER STACK POINTER WATCHDOG TIMER TIMING AND CONTROL RESET PROGRAM FLASH SRAM MCU CONTROL REGISTER INSTRUCTION REGISTER GENERAL PURPOSE REGISTERS X Y Z TIMER/ COUNTER INSTRUCTION DECODER INTERRUPT UNIT CONTROL LINES ALU EEPROM STATUS REGISTER PROGRAMMING LOGIC SPI OSCILLATOR DATA REGISTER PORTB DATA DIR. REG. PORTB PORTB DRIVERS PB0 - PB2 Description The AT90S/LS2323 and AT90S/LS2343 provides the following features: 2K bytes of In-System Programmable Flash, 128 bytes EEPROM, 128 bytes SRAM, 3 (AT90S/LS2323) / 5 (AT90S/LS2343) general purpose I/O lines, 32 general purpose working registers, an 8-bit timer/counter, internal and external interrupts, programmable Watchdog Timer with internal oscillator, an SPI serial port for Flash Memory downloading and two software selectable power saving modes. The Idle Mode stops the CPU while allowing the SRAM, timer/counters, SPI port and interrupt system to continue functioning. The power down mode saves the register contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset. The device is manufactured using Atmel’s high density non-volatile memory technology. The on-chip Flash allows the program memory to be reprogrammed in-system through an SPI serial interface. By combining an 8-bit RISC CPU with ISP Flash on a monolithic chip, the Atmel AT90S/LS2323 and AT90S/LS2343 is a powerful micro- controller that provides a highly flexible and cost effective solution to many embedded control applications. The AT90S/LS2323 and AT90S/LS2343 AVR is supported with a full suite of program and system development tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulators, and evaluation kits. Comparison Between AT90S/LS2323 and AT90S/LS2343 The AT90S/LS2323 is intended for use with external quartz crystal or ceramic resonator as the clock source. The startup time is fuse selectable as either 1 ms (suita.


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