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NM34C02

Fairchild

2K-Bit Standard 2-Wire Bus Interface

NM34C02 2K-Bit Standard 2-Wire Bus Interface March 1999 NM34C02 2K-Bit Standard 2-Wire Bus Interface Designed with Per...


Fairchild

NM34C02

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Description
NM34C02 2K-Bit Standard 2-Wire Bus Interface March 1999 NM34C02 2K-Bit Standard 2-Wire Bus Interface Designed with Permanent Write-Protection for First 128 Bytes for Serial Presence Detect Application on Memory Modules Features General Description The NM34C02 is 2048 bits of CMOS non-volatile electrically erasable memory. It is designed to support Serial Presence Detect circuitry in memory modules. This communications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for example a microprocessor) and the slave EEPROM device(s). The contents of the non-volatile memory allows the CPU to determine the capacity of the module and the electrical characteristics of the memory devices it contains. This will enable "plug and play" capability as the module is read and PC main memory resources utilized through the memory controller. The first 128 bytes of the memory of the NM34C02 can be permanently Write Protected by writing to the "WRITE PROTECT" Register. Write Protect implementation details are described under the section titled Addressing the WP Register. The NM34C02 is available in a JEDEC standard TSSOP package for low profile memory modules for systems requiring efficient space utilization such as in a notebook computer. Two options are available: L - Low Voltage and LZ - Low Power, allowing the part to be used in systems where battery life is of primary importance. s Extended Operating Voltage: 2.7V-5.5V s Write-Protection for ...




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