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MX98715AEC-E Dataheets PDF



Part Number MX98715AEC-E
Manufacturers Macronix International
Logo Macronix International
Description SINGLE CHIP FAST ETHERNET NIC CONTROLLER - ENHANCED VERSION
Datasheet MX98715AEC-E DatasheetMX98715AEC-E Datasheet (PDF)

ADVANCED INFORMATION MX98715AEC-E SINGLE CHIP FAST ETHERNET NIC CONTROLLER - ENHANCED VERSION 1. FEATURES • A single chip solution integrates 100/10 Base-T fast Ethernet MAC, PHY and PMD. • Microsoft PC97, 98, 99 and Novell 4.11/5.0 certified. • Support DMI 2.0 management. • Support Intel PXE remote boot device. • Fully comply to IEEE 802.3u specification • Operates over 100 meters of STP and category 5 UTP cable • Fully comply to PCI spec. 2.1 with clock frequency up to 33MHz • Fully comply to.

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ADVANCED INFORMATION MX98715AEC-E SINGLE CHIP FAST ETHERNET NIC CONTROLLER - ENHANCED VERSION 1. FEATURES • A single chip solution integrates 100/10 Base-T fast Ethernet MAC, PHY and PMD. • Microsoft PC97, 98, 99 and Novell 4.11/5.0 certified. • Support DMI 2.0 management. • Support Intel PXE remote boot device. • Fully comply to IEEE 802.3u specification • Operates over 100 meters of STP and category 5 UTP cable • Fully comply to PCI spec. 2.1 with clock frequency up to 33MHz • Fully comply to Advanced Configuration and Power Interface (ACPI) Rev 1.1 • Fully comply to PCI Bus Power Management Interface spec. Rev 1.1 • Support full and half duplex operations in both 100 Base-TX and 10 Base-T mode • Supports 3 kinds of wake up events defined in Network Device Class Power Management Spec 1.0. Including: - Magic PacketTM - Link Change(link-on) - Wake Up Frame • Supports IEEE802.3x Frame Based Flow Control scheme in full duplex mode. • Supports early interrupt on both transmit and receive operations. • 100/10 Base-T NWAY auto negotiation function • Large on-chip FIFOs for both transmit and receive operations without external local memory • Bus master architecture with linked host buffers delivers the most optimized performance • 32-bit bus master DMA channel provides ultra low CPU utilization, best fit in server and windows application. • Proprietary Adaptive Network Throughput Control (ANTC) technology to optimize data integrity and throughput • Support up to 64K bytes boot ROM interface • Three levels of loopback diagnositic capability • Support a variety of flexible address filtering modes with 16 CAM address and 128 bits hash • MicroWire interface to EEPROM for customer's IDs and configuration data • Single +5V power supply, CMOS technology, 128-pin PQFP package/LQPF package ( Magic packet technology is a trademark of advanced Micro Device Corp. ) 2. GENERAL DESCRIPTIONS The MX98715AEC-E controller is an IEEE802.3u compliant single chip 32-bit full duplex, 10/100Mbps highly integrated Fast Ethernet combo solution, designed to address high performance local area networking (LAN) system application requirements. MX98715AEC-E's PCI bus master architecture delivers the optimized performance for future high speed and powerful processor technologies. In other words, the MX98715AEC-E not only keeps CPU utilization low while maximizing data throughput, but it also optimizes the PCI bandwidth providing the highest PCI bandwidth utilization. To further reduce maintenance costs the MX98715AEC-E uses drivers that are backward compatible with the original MXIC MX98713 series controllers. The MX98715AEC-E contains a PCI local bus glueless interface, a Direct Memory Access (DMA) buffer management unit, an IEEE802.3u-compliant Media Access Controller (MAC), large Transmit and Receive FIFOs, and an on-chip 10 Base-T and 100 Base-TX transceiver simplifying system design and improving high speed signal quality. Full-duplex operation are supported in both 10 Base-T and 100 Base-TX modes that increases the controller's operating bandwidth up to 200Mbps. Equipped with intelligent IEEE802.3u-compliant auto-negotiation, the MX98715AEC-E-based adapter allows a single RJ-45 connector to link with the other IEEE802.3ucompliant device without re-configuration. In MX98715AEC-E, an innovative and proprietary design "Adaptive Network Throughput Control" (ANTC) is built-in to configure itself automatically by MXIC's driver based on the PCI burst throughput of different PCs. With this proprietary design, MX98715AEC-E can always optimize its operating bandwidth, network data integrity and throughput for different PCs. The MX98715AEC-E features Remote-Power-On and Remote-Wake-Up capability and is compliant with the Advanced Configuration and Power Interface version 1.0 P/N:PM0676 REV. 0.2, MAR. 04, 2000 1 MX98715AEC-E (ACPI). This support enables a wide range of wake-up capabilities, including the ability to customize the content of specified packet which PC should be responded to, even when it is in a low-power state. PCs and workstations could take advantage of these capabilities of being waked up and served simultaneously over the network by remote server or workstation. It helps organizations reduce their maintenance cost of PC network. The 32-bit multiplexed bus interface unit of MX98715AEC-E provides a direct interface to a PCI local bus, simplifing the design of an Ethernet adapter in a PC system. With its on-chip support for both little and big endian byte alignment, MX98715AEC-E can also address non-PC applications. 3. PIN CONFIGURATIONS CKREF/XI RTX2EQ BPA15 BPA14 BPA13 BPA12 BPA11 BPA10 BOEB TXON TXOP LED1 LED0 BPA9 BPA8 BPA7 67 BPA6 66 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 65 BPA5 RXIN RXIP GND GND GND GND GND GND GND GND VDD VDD VDD VDD VDD VDD VDD RDA RTX NC VDD GND GND VDD GND.


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