Document
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by MMFT108T1/D
Field Effect Transistor
N–Channel Enhancement–Mode Logic Level SOT–223
®
2, 4 DRAIN
MMFT108T1
TMOS FET TRANSISTOR N–CHANNEL — ENHANCEMENT
1 GATE 3 SOURCE
1 2 3 4
CASE 318E–04, STYLE 3 SOT–223 (TO–261AA)
MAXIMUM RATINGS
Rating Drain – to–Source Voltage Gate–to–Source Voltage — Continuous Drain Current — Continuous Total Power Dissipation @ TA = 25°C Derate above 25°C Operating and Storage Temperature Range Symbol VDSS VGS ID PD 0.8 6.4 TJ, Tstg – 65 to +150 Watts mW/°C °C Value 200 ±20 250 Unit Volts Volts mAdc
DEVICE MARKING
MT108
THERMAL CHARACTERISTICS
Thermal Resistance — Junction–to–Ambient (1) Maximum Temperature for Soldering Purposes Maximum Time in Solder Bath RθJA TL 156 260 10 °C/W °C Sec
1. Device mounted on FR4 glass epoxy printed circuit using minimum recommended foot print.
TMOS is a registered trademark of Motorola, Inc.
Motorola Small–Signal Transistors, FETs and Diodes Device Data © Motorola, Inc. 1997
1
MMFT108T1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage (VGS = 0, ID = 10 mA) Zero Gate Voltage Drain Current (VDS = 130 V, VGS = 0) Gate–Body Leakage Current — Reverse (VGS = 15 Vdc, VDS = 0) V(BR)DSS 200 IDSS — IGSS — — 10 — 30 nAdc — — nAdc Vdc
ON CHARACTERISTICS (2)
Gate Threshold Voltage (ID = 1.0 mAdc, VDS = VGS) Static Drain–to–Source On–Resistance (VGS = 2.0 Vdc, ID = 50 mA) (VGS = 2.8 Vdc, ID = 100 mA) Drain Cutoff Current (VGS = 0.2 V, VDS = 70 V) VGS(th) 0.5 rDS(on) — — IDSX — — 25 — — 10 8.0 — 1.5 Ohms Vdc
mA
DYNAMIC CHARACTERISTICS
Input Capacitance Output Capacitance Transfer Capacitance (VDS = 25 V, V VGS = 0, 0 f = 1.0 MHz) Ciss Coss Crss — — — — — — 150 30 10 pF
SWITCHING CHARACTERISTICS
Turn–On Time (See Figure 1) Turn–Off Time (See Figure 1) 2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle = 2.0%. ton toff — — — — 15 15 ns ns
RESISTIVE SWITCHING
+25 V 23 PULSE GENERATOR Vin 40 pF 50 50 1.0 M 20 dB 50 Ω ATTENUATOR TO SAMPLING SCOPE 50 Ω INPUT Vout ton 90% toff 90% 10% 90% 10 V INPUT Vin 50% 10% PULSE WIDTH 50%
OUTPUT V INVERTED out
Figure 1. Switching Test Circuit
Figure 2. Switching Waveforms
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
MMFT108T1
INFORMATION FOR USING THE SOT-223 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection
0.15 3.8 0.079 2.0
interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process.
0.091 2.3 0.079 2.0 0.059 1.5 0.059 1.5
0.091 2.3
0.248 6.3
0.059 1.5
inches mm
SOT-223
SOT-223 POWER DISSIPATION
The power dissipation of the SOT-223 is a function of the pad size. Thi.