M74HCT643

M54/74HCT245/640/643 M54/74HCT245/640/643 OCTAL BUS TRANSCEIVER (3-STATE): HCT245 NON INVERTING HCT640 INVERTING, HCT643 INVERTING/NON INVERTING . . . . . . . HIGH SPEED tPD = 10 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION o ICC = 4 µA (MAX.) at TA = 25 C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX.) OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 6 mA (MIN) BALANCED PROPAGATION DELAYS tPLH = tPHL PIN AND FUNCTION COMPATIBLE WITH 54/74LS245/640/643 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) DESCRIPTION The M54/74HCT245, HCT640 and HCT643 utilise silicon gate C2MOS technology to achive operating speeds eqivalent to LSTTL devices. Along with the low power dissipation and high noise immunity of standad CMOS integrated circuit, it possesses the capability to drive 15 LSTTL loads. These IC’s are intended for two-way asynchronous communication between data buses, and the direction of data trasmission is determined by DIR input. The enable input (G) can be used to disable the device so that the buses are effectively isolated. All input are equipped with protection circuits against static discharge and transient discharge. These integrated circuits have input and output PIN CONNECTION (top view) HCT245 HCT640 ORDER CODES : M54HCTXXXF1R M74HCTXXXM1R M74HCTXXXB1R M74HCTXXXC1R characteristics that are fully compatible with 54/74 LSTTL logic families. M54/74HCT devices are designed to direc...