M74HC283

M54HC283 M74HC283 4 BIT BINARY FULL ADDER . . . . . . . . . . HIGH SPEED tPD = 17 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V FULL-CARRY LOOK-AHEAD ACROSS THE FOUR BITS PARTIAL LOOK-AHEAD WITH THE ECONOMY OF RIPPLY CARRY PIN AND FUNCTION COMPATIBLE WITH 54/74LS283 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) ORDER CODES : M54HC283F1R M74HC283M1R M74HC283B1R M74HC283C1R PIN CONNECTIONS (top view) DESCRIPTION The M54/74HC283 is a high speed CMOS 4-BIT BINARY FULL ADDER fabricated in silicon gate 2 C MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Sum (Σ) outputs are provided for each bit and a resultant carry (C4) is obtained from the fourth bit. This adder features full internal look ahead across all four bits. A 4 x n binary adder is easily built up by cascading without any additional logic. All inputs are equipped with protection circuits against static discharge and transient excess voltage. October 1992 NC = No Internal Connection 1/10 M54/M74HC283 TRUTH TABLE (1 bit) INPUTS Bn L L L L H H H H An L L H H L L H H Cn-1 L H L H L H L H OUTPUTS Σn L H H L H L L H Cn L L L H L H H H BLOCK DIAGRAM LOGIC DIAG...