3 TO 8 LINE DECODER LATCH
M74HC237
3 TO 8 LINE DECODER LATCH
s HIGH SPEED:
tPD = 16ns (TYP.) at VCC = 6V
s LOW POWER DISSIPATION:
ICC = 4µA(M...
Description
M74HC237
3 TO 8 LINE DECODER LATCH
s HIGH SPEED:
tPD = 16ns (TYP.) at VCC = 6V
s LOW POWER DISSIPATION:
ICC = 4µA(MAX.) at TA=25°C
s HIGH NOISE IMMUNITY:
)VNIH = VNIL = 28 % VCC (MIN.) t(ss SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN)
ucs BALANCED PROPAGATION DELAYS: dtPLH ≅ tPHL ro )s WIDE OPERATING VOLTAGE RANGE: P t(sVCC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
lete uc74 SERIES 237 so rodDESCRIPTION b PThe M74HC237 is an high speed CMOS 3 TO 8
LINE DECODER fabricated with silicon gate
- O teC2MOS technology. ) leWhen GL goes from low to high, the address t(s opresent at the select inputs (A, B, C) is stored in sthe latches. As long as GL remains high no c baddress changes will be recognized. Output u Oenable controls, G1 and G2 control the state of the d -outputs independently of the select or
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
DIP SOP TSSOP
M74HC237B1R M74HC237M1R
T&R
M74HC237RM13TR M74HC237TTR
latch-enable inputs. All of the outputs are low unless G1 is high and G2 is low. The M74HC237 is ideally suited for the implementation of glitch-free decoders in stored-address applications in bus oriented systems. All inputs are equipped with protection circuits against static discharge and transient excess voltage.
OObbssoolleettee PPrrooduct(s)PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
1/11
M74HC237
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL NAME AND FUNCTION
1, 2, 3
A, B, C Data Inputs
4 GL Latch Enab...
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