Differential PECL/ECL/LVPECL/LVECL Receiver/Driver
19-2384; Rev 0; 4/02
Differential PECL/ECL/LVPECL/LVECL Receiver/Driver
General Description
The MAX9321B low-skew diffe...
Description
19-2384; Rev 0; 4/02
Differential PECL/ECL/LVPECL/LVECL Receiver/Driver
General Description
The MAX9321B low-skew differential receiver/driver is designed for clock and data distribution. The differential input can be adapted to accept a single-ended input by connecting the on-chip VBB supply to an input as a reference voltage. The MAX9321B features ultra-low propagation delay (172ps) and part-to-part skew (20ps) with 24mA maximum supply current, making this device ideal for clock buffering or repeating. For interfacing to differential PECL and LVPECL signals, these devices operate over a +3.0V to +5.5V supply range, allowing high-performance clock and data distribution in systems with a nominal 3.3V or 5.0V supply. For differential ECL and LVECL operation, this device operates from a -3.0V to -5.5V supply. The MAX9321B is offered in industry-standard 8-pin SO and TSSOP packages.
Features
o Improved Second Source of the MC10EP16D o +3.0V to +5.5V Differential PECL/LVPECL Operation o -3.0V to -5.5V Differential ECL/LVECL Operation o Low 17mA Supply Current o 20ps Part-to-Part Skew o 172ps Propagation Delay o Minimum 300mV Output at 3GHz o Output Low for Open Input o ESD Protection >2kV (Human Body Model) o On-Chip Reference for Single-Ended Input
MAX9321B
Applications
Precision Clock Buffer Low-Jitter Data Repeater
PART MAX9321BESA MAX9321BEUA*
Ordering Information
TEMP RANGE -40°C to +85°C -40°C to +85°C PIN-PACKAGE 8 SO 8 TSSOP
*Future product—contact factory for avail...
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