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MCM6709AR Dataheets PDF



Part Number MCM6709AR
Manufacturers Motorola
Logo Motorola
Description 64K x 4 Bit Static RAM
Datasheet MCM6709AR DatasheetMCM6709AR Datasheet (PDF)

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM6709AR/D 64K x 4 Bit Static RAM The MCM6709AR is a 262,144 bit static random access memory organized as 65,536 words of 4 bits, fabricated using high–performance silicon–gate BiCMOS technology. Static design eliminates the need for external clocks or timing strobes. Output enable (G) is a special control feature that provides increased system flexibility and eliminates bus contention problems. The MCM6709AR meets JEDEC standards .

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM6709AR/D 64K x 4 Bit Static RAM The MCM6709AR is a 262,144 bit static random access memory organized as 65,536 words of 4 bits, fabricated using high–performance silicon–gate BiCMOS technology. Static design eliminates the need for external clocks or timing strobes. Output enable (G) is a special control feature that provides increased system flexibility and eliminates bus contention problems. The MCM6709AR meets JEDEC standards and is available in a revolutionary pinout 300 mil, 28 lead plastic surface–mount SOJ package. • • • • • • Single 5 V ± 10% Power Supply Fully Static — No Clock or Timing Strobes Necessary All Inputs and Outputs are TTL Compatible Center Power and I/O Pins for Reduced Noise Three State Outputs Fast Access Times: MCM6709AR–6 = 6 ns MCM6709AR–7 = 7 ns MCM6709AR J PACKAGE 300 MIL SOJ CASE 810B–03 PIN ASSIGNMENT A0 A1 A2 A3 E DQ0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A15 A14 A13 A12 G DQ3 VSS VCC DQ2 A11 A10 A9 A8 NC BLOCK DIAGRAM A A A A A A A A A ROW DECODER VCC VSS DQ1 W A4 • • • MEMORY MATRIX 512 ROWS x 128 x 4 COLUMNS A5 A6 A7 PIN NAMES DQ0 COLUMN I/O • • • DQ3 • • • INPUT DATA CONTROL COLUMN DECODER • • • A E W G A A A A A A A0 – A15 . . . . . . . . . . . . Address Inputs W . . . . . . . . . . . . . . . . . . . . Write Enable G . . . . . . . . . . . . . . . . . . . Output Enable E . . . . . . . . . . . . . . . . . . . . . . Chip Enable DQ0 – DQ3 . . . . . . . . Data Input/Output VCC . . . . . . . . . . . . + 5 V Power Supply VSS . . . . . . . . . . . . . . . . . . . . . . . Ground NC . . . . . . . . . . . . . . . . . No Connection All power supply and ground pins must be connected for proper operation of the device. 5/95 © Motorola, Inc. 1995 MOTOROLA FAST SRAM MCM6709AR 1 TRUTH TABLE (X = Don’t Care) E H L L L G X H L X W X H H L Mode Not Selected Read Read Write Output High–Z High–Z Dout Din Cycle — — Read Cycle Write Cycle ABSOLUTE MAXIMUM RATINGS (See Note) Rating Power Supply Voltage Voltage Relative to VSS for Any Pin Except VCC Output Current (per I/O) Power Dissipation Temperature Under Bias Operating Temperature Storage Temperature — Plastic Symbol VCC Vin, Vout Iout PD Tbias TA Value – 0.5 to + 7.0 – 0.5 to VCC + 0.5 ± 30 2.0 – 10 to + 85 0 to + 70 Unit V V mA W °C °C This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high–impedance circuit. This BiCMOS memory circuit has been designed to meet the dc and ac specifications shown in the tables, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow of at least 500 linear feet per minute is maintained. Tstg – 55 to + 125 °C NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to RECOMMENDED OPERATING CONDITIONS. Exposure to higher than recommended voltages for extended periods of time could affect device reliability. DC OPERATING CONDITIONS AND CHARACTERISTICS (VCC = 5.0 V ± 10%, TA = 0 to 70°C, Unless Otherwise Noted) RECOMMENDED OPERATING CONDITIONS Parameter Supply Voltage (Operating Voltage Range) Input High Voltage Input Low Voltage Symbol VCC VIH Min 4.5 2.2 Typ 5.0 — — Max 5.5 VCC + 0.3* 0.8 Unit V V V VIL – 0.5** * VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2.0 V ac (pulse width ≤ 2.0 ns) or I ≤ 30.0 mA. ** VIL (min) = – 0.5 V dc @ 30.0 mA; VIL (min) = – 2.0 V ac (pulse width ≤ 2.0 ns) or I ≤ 30.0 mA. DC CHARACTERISTICS Parameter Input Leakage Current (All Inputs, Vin = 0 to VCC) Output Leakage Current (E = VIH, Vout = 0 to VCC) Output High Voltage (IOH = – 4.0 mA) Output Low Voltage (IOL = 8.0 mA) Symbol Ilkg(I) Ilkg(O) VOH VOL Min — — 2.4 — Max ± 1.0 ± 1.0 — 0.4 Unit µA µA V V POWER SUPPLY CURRENTS Parameter AC Active Supply Current (Iout = 0 mA, VCC = max, f = fmax) AC Standby Current (E = VIH, VCC = max, f = fmax) CMOS Standby Current (VCC = max, f = 0 MHz, E ≥ VCC – 0.2 V, Vin ≤ VSS, or ≥ VCC – 0.2 V) Symbol ICCA ISB1 ISB2 MCM6709AR–6 235 95 20 MCM6709AR–7 225 85 20 Unit mA mA mA Notes 1, 2, 3 1, 2, 3 NOTES: 1. Reference AC Operating Conditions and Characteristics for input and timing (VIH/VIL, tr/tf, pulse level 0 to 3.0 V, VIH = 3.0 V). 2. All addresses transition simultaneously low (LSB) and then high (MSB). 3. Data states are all zero. MCM6709AR 2 MOTOROLA FAST SRAM CAPACITANCE (f = 1.0 MHz, dV = 3.0 V, TA = 25°C, Periodically Sampled Rather Than 100% Tested) Parameter Address Input Capacitance Control Pin Input Capacitance (E, G, W) Input/Output Capacitance Symbol Cin Cin CI/O Max 5 6 6 Unit pF pF pF AC OPERATING CONDITIONS AND CHARACTERISTICS (VCC = 5.0 V ± 10%, TA = 0 to + 70°C, Unless Otherwise Noted) Input Tim.


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