MCM6709A

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM6709A/D 64K x 4 Bit Static RAM The MCM6709A is a 262,144 bit static random access memory organized as 65,536 words of 4 bits, fabricated using high–performance silicon–gate BiCMOS technology. Static design eliminates the need for external clocks or timing strobes. Output enable (G) provides increased system flexibility and eliminates bus contention problems. The MCM6709A is available in a 300 mil, 28 lead plastic surface–mount SOJ package. Single 5 V ± 10% Power Supply Fully Static — No Clock or Timing Strobes Necessary All Inputs and Outputs are TTL Compatible Three State Outputs Fast Access Times: MCM6709A–8 = 8 ns MCM6709A–10 = 10 ns MCM6709A–12 = 12 ns BLOCK DIAGRAM A A A A A A A A ROW DECODER MEMORY MATRIX 256 ROWS x 256 x 4 COLUMNS MCM6709A J PACKAGE 300 MIL SOJ CASE 810B–03 PIN ASSIGNMENT 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC A15 A14 A13 A12 A11 A10 NC NC DQ0 DQ1 DQ2 DQ3 W NC A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 E G VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 DQ0 DQ3 A A A INPUT DATA CONTROL COLUMN I/O COLUMN DECODER PIN NAMES A0 – A15 . . . . . . . . . . . . Address Inputs W . . . . . . . . . . . . . . . . . . . . Write Enable G . . . . . . . . . . . . . . . . . . . Output Enable E . . . . . . . . . . . . . . . . . . . . . . Chip Enable DQ0 – DQ3 . . . . . . . . Data Input/Output VCC . . . . . . . . . . . . + 5 V Power Supply VSS . . . . . . . . . . . . . . . . . . . . . ....