MCM6706R

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM6706R/D 32K x 8 Bit Static Random Access Memory The MCM6706R is a 262,144 bit static random access memory organized as 32,768 words of 8 bits, fabricated using high performance silicon–gate BiCMOS technology. Static design eliminates the need for external clocks or timing strobes. Output enable (G) is a special control feature that provides increased system flexibility and eliminates bus contention problems. The MCM6706R meets JEDEC standards and is available in a revolutionary pinout 300 mil, 32–lead surface–mount SOJ package. Single 5.0 V ± 10% Power Supply Fully Static — No Clock or Timing Strobes Necessary All Inputs and Outputs Are TTL Compatible Three State Outputs Fast Access Times: MCM6706R–6 = 6 ns MCM6706R–7 = 7 ns MCM6706R–8 = 8 ns Center Power and I/O Pins for Reduced Noise MCM6706R J PACKAGE 300 MIL SOJ CASE 857–02 PIN ASSIGNMENT A0 A1 A2 A3 E DQ0 DQ1 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 NC A14 A13 A12 G DQ7 DQ6 VSS VCC DQ5 DQ4 A11 A10 A9 A8 NC BLOCK DIAGRAM A A A A A A A A A DQ0 INPUT DATA CONTROL DQ7 A COLUMN I/O COLUMN DECODER ROW DECODER MEMORY MATRIX 512 ROWS x 64 x 8 COLUMNS VCC VSS VSS DQ2 DQ3 W A4 A5 A6 A7 PIN NAMES A0 – A14 . . . . . . . . . . . . . . . . . . Address W . . . . . . . . . . . . . . . . . . . . Write Enable E . . . . . . . . . . . . . . . . . . . . . . Chip Enable G . . . . . . . . . . . . . . . . . . . ...