MCM6246

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM6246/D 512K x 8 Bit Static Random Access Memory The MCM6246 is a 4,194,304 bit static random access memory organized as 524,288 words of 8 bits. Static design eliminates the need for external clocks or timing strobes, while CMOS circuitry reduces power consumption and provides for greater reliability. The MCM6246 is equipped with chip enable (E) and output enable (G) pins, allowing for greater system flexibility and eliminating bus contention problems. Either input, when high, will force the outputs into high impedance. The MCM6246 is available in a 400 mil, 36–lead surface–mount SOJ package. Single 5 V ± 10% Power Supply Fast Access Time: 17/20/25/35 ns Equal Address and Chip Enable Access Time All Inputs and Outputs are TTL Compatible Three–State Outputs Power Operation: 205/200/185/170 mA Maximum, Active AC MCM6246 WJ PACKAGE 400 MIL SOJ CASE 893–01 PIN ASSIGNMENT A A A A A E 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 NC A A A A G DQ DQ VSS VCC DQ DQ A A A A A NC BLOCK DIAGRAM A A A A A A A A A A ROW DECODER MEMORY MATRIX 1024 ROWS x 4096 COLUMNS DQ DQ VCC VSS DQ DQ W A A A A A DQ INPUT DATA CONTROL DQ A A A COLUMN I/O COLUMN DECODER PIN NAMES A . . . . . . . . . . . . . . . . . . . Address Inputs W . . . . . . . . . . . . . . . . . . . . Write Enable G . . . . . . . . . . . . . . . . . . . Output Enable E . . . . . . . . . . . . . ...