MC92052

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this Data Sheet by MC92052/D Product Brief MC92052 FTTC User Framer MC92052 The MC92052 is a peripheral device for the user side of an FTTC drop. It is composed of downstream and upstream TC-sublayer functionality with UTOPIA compliant ATM-layer ports. MC92052 Features Implements the DAVIC short-range baseband asymmetrical physical layer standard Supports a bit rate of up to 51.84 Mbit/sec downstream Provides TDMA at a bit rate of up to 6.48 Mbit/s upstream, including DAVIC Bit Rates B, C, and D Interfaces to an ATM-layer device using a UTOPIA compliant interface Performs convolutional deinterleaving of the downstream payload blocks for the full range of interleaving depths (M = 1-31) using an external 16K x 8 SRAM Can optionally use an internal RAM for deinterleaving when the interleaving depth is small (M ≤ 2) Performs Reed-Solomon encoding of the upstream frames and decoding of the downstream frames Performs HEC-based cell delineation and error correction on the downstream data Optionally filters received ATM cells based on GFC/VPI pattern matching Includes serial data interfaces to a Physical Medium Dependent (PMD) sublayer device Optional serial data link interfaces for upstream and downstream frames Includes a power level control interface to the transmitter Provides an 8-bit system interface as a generic slave device IEEE 1149.1 (JTAG) boundary scan test port 3.3 V operation with TTL comp...