74V2G08

74V2G08 DUAL 2-INPUT AND GATE s s s s s s s s HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) at VCC = 4.5V BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V IMPROVED LATCH-UP IMMUNITY SOT23-8L ORDER CODES PACKAGE SOT23-8L T&R 74V2G08STR DESCRIPTION The 74V2G08 is an advanced high-speed CMOS DUAL 2-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. PIN CONNECTION AND IEC LOGIC SYMBOLS June 2003 1/7 74V2G08 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 5 2, 6 7, 3 4 8 SYMBOL 1A, 2A 1B, 2B 1Y, 2Y GND VCC NAME QND FUNCTION Data Input Data Input Data Output Ground (0V) Positive Supply Voltage TRUTH TABLE A L L H H B L H L H Y L L L H ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to VC...