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74LVT573

NXP

3.3V Octal D-type transparent latch

74LVT573 3.3 V octal D-type transparent latch; 3-state Rev. 8 — 22 November 2011 Product data sheet 1. General descrip...


NXP

74LVT573

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Description
74LVT573 3.3 V octal D-type transparent latch; 3-state Rev. 8 — 22 November 2011 Product data sheet 1. General description The 74LVT573 is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device is an octal transparent latch coupled to eight 3-state output buffers. The two sections of the device are controlled independently by Latch Enable (LE) and Output Enable (OE) control gates. The 74LVT573 has a broadside pinout configuration to facilitate PC board layout and allow easy interface with microprocessors. The data on the Dn inputs are transferred to the latch outputs when the Latch Enable (LE) input is High. The latch remains transparent to the data inputs while LE is High, and stores the data that is present one setup time before the High-to-Low enable transition. The 3-state output buffers are designed to drive heavily loaded 3-state buses, MOS memories, or MOS microprocessors. The active-Low Output Enable (OE) controls all eight 3-state buffers indepe...




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