Document
74LVQ157 Low Voltage Quad 2-Input Multiplexer
May 1998
74LVQ157 Low Voltage Quad 2-Input Multiplexer
General Description
The LVQ157 is a high-speed quad 2-input multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four outputs present the selected data in the true (noninverted) form. The LVQ157 can also be used as a function generator.
Features
n Ideal for low power/low noise 3.3V applications n Guaranteed simultaneous switching noise level and dynamic threshold performance n Guaranteed pin-to-pin skew AC performance n Guaranteed incident wave switching into 75Ω.
Ordering Code:
Order Number 74LVQ157SC 74LVQ157SJ Package Number M16A M16D Package Description 16-Lead (0.150" Wide) Small Outline Integrated Circuit, SOIC JEDEC 16-Lead Molded Small Outline Package, SOIC EIAJ
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
Pin Assignment for SOIC JEDEC and EIAJ
DS011352-1
IEEE/IEC
DS011352-2
Pin Descriptions
Pin Names I0a–I0d I1a–I1d E S Za–Zd
DS011352-3
Description Source 0 Data Inputs Source 1 Data Inputs Enable Input Select Input Outputs
© 1998 Fairchild Semiconductor Corporation
DS011352
www.fairchildsemi.com
Truth Table
Inputs E H L L L L S X H H L L I0 X X X L H I1 X L H X X Outputs Z L L H L H
Functional Description
The LVQ157 is a quad 2-input multiplexer. It selects four bits of data from two sources under the control of a common Select input (S). The Enable input (E) is active-LOW. When E is HIGH, all of the outputs (Z) are forced LOW regardless of all other inputs. The LVQ157 is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are shown below: Za = E • (I1a • S + I0a • S ) Zb = E • (I1b • S + I0b • S ) Zc = E • (I1c • S + I0c • S ) Zd = E • (I1d • S + I0d • S ) A common use of the LVQ157 is the moving of data from two groups of registers to four common output busses. The particular register from which the data comes is determined by the state of the Select input. A less obvious use is as a function generator. The LVQ157 can generate any four of the sixteen different functions of two variables with one variable common. This is useful for implementing gating functions.
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
Logic Diagram
DS011352-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.fairchildsemi.com
2
Absolute Maximum Ratings (Note 1)
Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V VI = VCC + 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current (ICC or IGND) Storage Temperature (TSTG) DC Latch-Up Source or Sink Current −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC + 0.5V
Recommended Operating Conditions (Note 2)
Supply Voltage (VCC) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Minimum Input Edge Rate (∆V/∆t) VIN from 0.8V to 2.0V VCC @ 3.0V 2.0V to 3.6V 0V to VCC 0V to VCC −40˚C to +85˚C
125 mV/ns
± 50 mA ± 200 mA −65˚C to +150˚C ± 100 mA
Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol Parameter VCC (V) 3.0 3.0 3.0 3.0 3.0 3.0 3.6 3.6 3.6 3.6 3.3 3.3 3.3 3.3 0.7 −0.4 1.7 1.6 4.0 0.8 −0.8 2.0 0.8 0.002 TA = +25˚C Typ VIH VIL VOH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage 2.99 2.9 2.58 0.1 0.36 2.9 2.48 0.1 0.44 V V V V µA mA mA µA V V V V 1.5 0.8 0.8 V 1.5 2.0 TA = −40˚C to +85˚C Guaranteed Limits 2.0 V VOUT = 0.1V or VCC − 0.1V VOUT = 0.1V or VCC − 0.1V IOUT = −50 µA VIN = VIL or VIH (Note 3) IOH = −12 mA VOL Maximum Low Level Output Voltage IOUT = 50 µA VIN = VIL or VIH (Note 3) IOL = 12 mA IIN IOLD IOHD ICC VOLP VOLV VIHD VILD Maximum Input Leakage Current Minimum Dynamic Output Current (Note 4) Maximum Quiescent Supply Current Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Maximum High Level Dynamic Input Voltage Maximum Low Level Dynamic Input Voltage
Note 3: All outputs loaded; thresholds on input associated with output under test. Note 4: Maximum test duration 2.0 ms, one output loaded at a time. Note 5: Incident wave switching on transmission lines with impedances as low as 75Ω for com.