M48Z30

M48Z30 M48Z30Y CMOS 32K x 8 ZEROPOWER SRAM INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 10 YEARS of DATA RETENTION in the ABSENCE of POWER PIN and FUNCTION COMPATIBLE with JEDEC STANDARD 32K x 8 SRAMs AUTOMATIC POWER-FAIL CHIP DESELECT and WRITE PROTECTION CHOICE of TWO WRITE PROTECT VOLTAGES: – M48Z30: 4.5V ≤ VPFD ≤ 4.75V – M48Z30Y: 4.2V ≤ VPFD ≤ 4.50V BATTERY INTERNALLY ISOLATED UNTIL POWER IS APPLIED 28 1 PMDIP28 (PM) Module Figure 1. Logic Diagram DESCRIPTION The M48Z30/30Y 32K x 8 ZEROPOWER® RAM is a non-volatile 262,144 bit Static RAM organized as 32,768 words by 8 bits. The device combines an internal lithium battery and a full CMOS SRAM in a plastic 28 pin DIP Module. The ZEROPOWER Table 1. Signal Names A0 - A14 DQ0 - DQ7 E G W VCC VSS Address Inputs Data Inputs / Outputs Chip Enable Output Enable Write Enable Supply Voltage Ground July 1994 1/12 M48Z30, M48Z30Y Table 2. Absolute Maximum Ratings Symbol TA TSTG TBIAS TSLD VIO VCC Parameter Ambient Operating Temperature Storage Temperature (V CC Off) Temperature Under Bias Lead Soldering Temperature for 10 seconds Input or Output Voltages Supply Voltage Value 0 to 70 –40 to 70 –10 to 70 260 –0.3 to 7 –0.3 to 7 Unit °C °C °C °C V V Note: Stresses greater than those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditio...