Document
Philips Semiconductors
Product specification
PowerMOS transistors FREDFET, Avalanche energy rated
FEATURES
• Repetitive Avalanche Rated • Fast switching • Stable off-state characteristics • High thermal cycling performance • Low thermal resistance • Fast reverse recovery diode
PHP6ND50E, PHB6ND50E
SYMBOL
d
QUICK REFERENCE DATA VDSS = 500 V ID = 5.9 A
g
RDS(ON) ≤ 1.5 Ω
s
trr = 180 ns
GENERAL DESCRIPTION
N-channel, enhancement mode field-effect power transistor, incorporating a Fast Recovery Epitaxial Diode (FRED). This gives improved switching performance in half bridge and full bridge converters making this device particularly suitable for inverters, lighting ballasts and motor control circuits. The PHP6ND50E is supplied in the SOT78 (TO220AB) conventional leaded package. The PHB6ND50E is supplied in the SOT404 surface mounting package.
PINNING
PIN 1 2 3 tab gate drain 1 source DESCRIPTION
SOT78 (TO220AB)
tab
SOT404
tab
2
drain
1 23
1
3
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDSS VDGR VGS ID IDM PD Tj, Tstg Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current Pulsed drain current Total dissipation Operating junction and storage temperature range CONDITIONS Tj = 25 ˚C to 150˚C Tj = 25 ˚C to 150˚C; RGS = 20 kΩ Tmb = 25 ˚C; VGS = 10 V Tmb = 100 ˚C; VGS = 10 V Tmb = 25 ˚C Tmb = 25 ˚C MIN. - 55 MAX. 500 500 ± 30 5.9 3.7 24 125 150 UNIT V V V A A A W ˚C
August 1998
1
Rev 1.100
Philips Semiconductors
Product specification
PowerMOS transistors FREDFET, Avalanche energy rated
AVALANCHE ENERGY LIMITING VALUES
PHP6ND50E, PHB6ND50E
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER EAS Non-repetitive avalanche energy CONDITIONS MIN. MAX. 280 UNIT mJ Unclamped inductive load, IAS = 4 A; tp = 0.17 ms; Tj prior to avalanche = 25˚C; VDD ≤ 50 V; RGS = 50 Ω; VGS = 10 V; refer to fig:17 Repetitive avalanche energy1 IAR = 5.9 A; tp = 1 µs; Tj prior to avalanche = 25˚C; RGS = 50 Ω; VGS = 10 V; refer to fig:18 Repetitive and non-repetitive avalanche current
EAR IAS, IAR
-
10 5.9
mJ A
THERMAL RESISTANCES
SYMBOL PARAMETER Rth j-mb Rth j-a Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS MIN. SOT78 package, in free air SOT404 package, pcb mounted, minimum footprint TYP. MAX. UNIT 60 50 1 K/W K/W K/W
1 pulse width and repetition rate limited by Tj max. August 1998 2 Rev 1.100
Philips Semiconductors
Product specification
PowerMOS transistors FREDFET, Avalanche energy rated
ELECTRICAL CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER Drain-source breakdown voltage ∆V(BR)DSS / Drain-source breakdown ∆Tj voltage temperature coefficient RDS(ON) Drain-source on resistance VGS(TO) Gate threshold voltage Forward transconductance gfs IDSS Drain-source leakage current IGSS Qg(tot) Qgs Qgd td(on) tr td(off) tf Ld Ld Ls Ciss Coss Crss V(BR)DSS CONDITIONS VGS = 0 V; ID = 0.25 mA VDS = VGS; ID = 0.25 mA
PHP6ND50E, PHB6ND50E
MIN. 500 2.0 2 -
TYP. MAX. UNIT 0.1 1.2 3.0 3.6 1 30 10 53 4 28 10 33 92 40 3.5 4.5 7.5 610 96 54 1.5 4.0 25 250 200 64 6 34 V %/K Ω V S µA µA nA nC nC nC ns ns ns ns nH nH nH pF pF pF
VGS = 10 V; ID = 3 A VDS = VGS; ID = 0.25 mA VDS = 30 V; ID = 3 A VDS = 500 V; VGS = 0 V VDS = 400 V; VGS = 0 V; Tj = 125 ˚C Gate-source leakage current VGS = ±30 V; VDS = 0 V Total gate charge Gate-source charge Gate-drain (Miller) charge Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal drain inductance Internal source inductance Input capacitance Output capacitance Feedback capacitance ID = 6 A; VDD = 400 V; VGS = 10 V VDD = 250 V; RD = 39 Ω; RG = 12 Ω
Measured from tab to centre of die Measured from drain lead to centre of die (SOT78 package only) Measured from source lead to source bond pad VGS = 0 V; VDS = 25 V; f = 1 MHz
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER IS ISM VSD trr Qrr Irrm Continuous source current (body diode) Pulsed source current (body diode) Diode forward voltage Reverse recovery time Reverse recovery charge Peak reverse recovery current CONDITIONS Tmb = 25˚C Tmb = 25˚C IS = 6 A; VGS = 0 V IS = 6 A; VGS = 0 V; dI/dt = 100 A/µs IS = 6 A; VGS = 0 V; dI/dt = 100 A/µs; 125˚C IS = 6 A; VGS = 0 V; dI/dt = 100 A/µs IS = 6 A; VGS = 0 V; dI/dt = 100 A/µs; 125˚C IS = 6 A; VGS = 0 V; dI/dt = 100 A/µs; 125˚C MIN. TYP. MAX. UNIT 180 220 0.65 2.6 15 5.9 24 1.5 A A V ns ns µC µC A
August 1998
3
Rev 1.100
Philips Semiconductors
Product specification
PowerMOS transistors FREDFET, Avalanche energy rated
PHP6ND50E, PHB6ND50E
120 110 100 90 80 70 60 50 40 30 20 10 0
PD%
Normalised Power Derating
1
Zth j-mb, Transient thermal impedance (K/W) D = 0.5 0.2
PHP3N60
0.1 0.1 0.05 0.02
0.01
single pulse
P D
tp
D=
tp T t
T
0
20
40
60
80 100 Tmb / C
120
140
0.001 1u.