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PHP3055

NXP

PowerMOS transistor Logic level FET

Philips Semiconductors Product specification N-channel TrenchMOS™ transistor PHP3055E, PHD3055E FEATURES • ’Trench’ ...


NXP

PHP3055

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Philips Semiconductors Product specification N-channel TrenchMOS™ transistor PHP3055E, PHD3055E FEATURES ’Trench’ technology Low on-state resistance Fast switching SYMBOL d QUICK REFERENCE DATA VDSS = 55 V ID = 10.3 A g RDS(ON) ≤ 150 mΩ (VGS = 10 V) s GENERAL DESCRIPTION N-channel enhancement mode, field-effect power transistor in a plastic envelope using ’trench’ technology. Applications: d.c. to d.c. converters switched mode power supplies The PHP3055E is supplied in the SOT78 (TO220AB) conventional leaded package. The PHD3055E is supplied in the SOT428 (DPAK) surface mounting package. PINNING PIN 1 2 3 tab gate drain1 source DESCRIPTION SOT78 (TO220AB) tab SOT428 (DPAK) tab 2 drain 1 23 1 3 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDSS VDGR VGS ID IDM PD Tj, Tstg Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current Pulsed drain current Total power dissipation Operating junction and storage temperature CONDITIONS Tj = 25 ˚C to 175˚C Tj = 25 ˚C to 175˚C; RGS = 20 kΩ Tmb = 25 ˚C Tmb = 100 ˚C Tmb = 25 ˚C Tmb = 25 ˚C MIN. - 55 MAX. 55 55 ± 20 10.3 7.3 41 33 175 UNIT V V V A A A W ˚C 1 It is not possible to make connection to pin:2 of the SOT428 package August 1999 1 Rev 1.200 Philips Semiconductors Product specification N-channel TrenchMOS™ transistor PHP3055E PHD3055E AVALANCHE ENERGY LIMITING VALUES Limiting values in accordance with the Absolute Ma...




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