MACH4-96

1 FINAL MACH 4 FAMILY COM’L: -15 IND: -18 Lattice Semiconductor MACH4-96/96-15 High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS x 144 Pins in PQFP x 96 Macrocells x 15 ns tPD Commercial, 18 ns tPD Industrial x 47.6 MHz fCNT x 102 Inputs with pull-up resistors x 96 I/Os; 4 dedicated inputs/clocks; 2 dedicated inputs x 96 Flip-flops x Up to 20 product terms per macrocell, with XOR x Flexible clocking MACH 4 Family x x x x x — Four global clock pins with selectable edges — Asynchronous mode available for each macrocell 3 MACH111SP-size blocks SpeedLocking™ for guaranteed fixed timing JTAG, 5-V, in-system programmable JTAG (IEEE 1149.1) boundary scan testing capability Input and output switch matrices for high routability PLEASE NOTE: The MACH4-96/96 (M4-96/96) reflects a new nomenclature for the MACH® 4 Family. This device is currently dual-marked with the MACH355 ordering part number. The dual-mark scheme will facilitate design and manufacturing flows until we have completely phased in the new M4-96/96 nomenclature. Please use the MACH355 data sheet (PID# 17467) as a reference. GENERAL DESCRIPTION The MACH4-96/96 (M4-96/96) is a member of Vantis’ high-performance EE CMOS MACH 4 family. This device has approximately three times the macrocell capability of the popular MACH111SP, with significant additional density and functional features. The M4-96/96 consists of six PAL® blocks interconnected by a programmable central switch matrix. The central switch...