PHC20306

DISCRETE SEMICONDUCTORS DATA SHEET PHC20306 Complementary enhancement mode MOS transistor Objective specification File under Discrete Semiconductors, SC13b 1998 Feb 18 Philips Semiconductors Objective specification Complementary enhancement mode MOS transistor FEATURES Very low on-state resistance High-speed switching No secondary breakdown. APPLICATIONS Motor and actuator driver Power management Synchronized rectification. DESCRIPTION One N-channel and one P-channel enhancement mode MOS transistor in an 8-pin SOT96-1 (SO8) plastic package. CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling. 1 4 s1 8 handbook, halfpage 5 d1 d1 PHC20306 PINNING - SOT96-1 (SO8) PIN 1 2 3 4 5 6 7 8 SYMBOL s1 g1 s2 g2 d2 d2 d1 d1 DESCRIPTION source 1 gate 1 source 2 gate 2 drain 2 drain 2 drain 1 drain 1 d2 d2 MAM118 g1 s2 g2 Fig.1 Simplified outline and symbol. QUICK REFERENCE DATA SYMBOL Per channel VDS drain-source voltage (DC) N-channel P-channel VSD source-drain diode forward voltage N-channel P-channel VGSO VGSth gate-source voltage (DC) gate-source threshold voltage N-channel P-channel ID drain current (DC) N-channel P-channel RDSon drain-source on-state resistance N-channel P-channel Ptot 1998 Feb 18 total power dissipation VGS = 10 V; ID = 4 A VGS = −10 V; ID = −2.8 A Ts = 80 °C 2 − − − 30 65 3.5 mΩ mΩ W VDS = VGS; ID = 1 mA VDS = VGS ; ID = −1 mA Ts = 80 °C − − 8.2 ...