MA31753

MA31753 MA31753 DMA Controller (DMAC) For An MA31750 System Replaces June 1999 version, DS3825-4.0 DS3825-5.0 January 2000 The MA31753 Direct Memory Access Controller (DMAC) is a peripheral interface circuit design primarily for use with the MA31750 microprocessor. Each DMAC provides up to four independant, prioritised channels each of which can perform DMA transfers between memory and/or I/O devices using the MA31750 bus. Each channel has its own programmable internal priority and can be masked under program control. Further, individual channels have their own associated status and control words enabling an individual channel to be reprogrammed without disturbing transfers which may be taking place on other channels. Three basic transfer modes are available: Direct Memory to I/O peripheral transfers, Direct I/O to Memory transfers, Memory to Memory transfers, I/O to I/O transfers. The MA31753 interfaces directly to the MA31750 bus, directly supporting on chip parity generation and supporting expanded memory via an MA31751 MMU with either 1 MWord (1750A mode) or 16MWords (1750B mode) of logical memory. The MA31753 uses System memory to hold address and count information for each transfer. Once this information has been prepared by the processor the DMAC can conduct a number of transfers without further processor intervention. AS[0:3] PS[0:3] PB[0:3] D[0:16] A[0:15] CSN CLK RESETN DSN AS MION OIN RDWN RDN WRN RDYN GRANTN REQN LOCKN DMAKN DREQN[0:3] DACKN[0:3] DMAE SEC/FIRS...