PHB42N03LT

Philips Semiconductors Product specification TrenchMOS™ transistor Logic level FET FEATURES ’Trench’ technology Very low on-state resistance Fast switching Stable off-state characteristics High thermal cycling performance Low thermal resistance Surface mounting package PHB42N03LT SYMBOL d QUICK REFERENCE DATA VDSS = 30 V ID = 42 A g RDS(ON) ≤ 26 mΩ (VGS = 5 V) RDS(ON) ≤ 23 mΩ (VGS = 10 V) s GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope using ’trench’ technology. The device has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching applications. The PHB42N03LT is supplied in the SOT404 surface mounting package. PINNING PIN 1 2 3 tab gate drain (no connection possible) source drain DESCRIPTION SOT404 mb 2 1 3 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR ±VGS ID ID IDM Ptot Tstg, Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage & operating temperature CONDITIONS RGS = 20 kΩ Tmb = 25 ˚C Tmb = 100 ˚C Tmb = 25 ˚C Tmb = 25 ˚C MIN. - 55 MAX. 30 30 15 42 33 168 86 175 UNIT V V V A A A W ˚C THERMAL RESISTANCES SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS pcb mounted, minimum footp...