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PHB3N50E Dataheets PDF



Part Number PHB3N50E
Manufacturers NXP
Logo NXP
Description PowerMOS transistors Avalanche energy rated
Datasheet PHB3N50E DatasheetPHB3N50E Datasheet (PDF)

Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated FEATURES • Repetitive Avalanche Rated • Fast switching • Stable off-state characteristics • High thermal cycling performance • Low thermal resistance PHP3N50E, PHB3N50E SYMBOL d QUICK REFERENCE DATA VDSS = 500 V g ID = 3.4 A RDS(ON) ≤ 3 Ω s GENERAL DESCRIPTION N-channel, enhancement mode field-effect power transistor, intended for use in off-line switched mode power supplies, T.V. and computer monitor.

  PHB3N50E   PHB3N50E


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Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated FEATURES • Repetitive Avalanche Rated • Fast switching • Stable off-state characteristics • High thermal cycling performance • Low thermal resistance PHP3N50E, PHB3N50E SYMBOL d QUICK REFERENCE DATA VDSS = 500 V g ID = 3.4 A RDS(ON) ≤ 3 Ω s GENERAL DESCRIPTION N-channel, enhancement mode field-effect power transistor, intended for use in off-line switched mode power supplies, T.V. and computer monitor power supplies, d.c. to d.c. converters, motor control circuits and general purpose switching applications. The PHP3N50E is supplied in the SOT78 (TO220AB) conventional leaded package. The PHB3N50E is supplied in the SOT404 surface mounting package. PINNING PIN 1 2 3 tab gate drain 1 source DESCRIPTION SOT78 (TO220AB) tab SOT404 tab 2 drain 1 23 1 3 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDSS VDGR VGS ID IDM PD Tj, Tstg Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current Pulsed drain current Total dissipation Operating junction and storage temperature range CONDITIONS Tj = 25 ˚C to 150˚C Tj = 25 ˚C to 150˚C; RGS = 20 kΩ Tmb = 25 ˚C; VGS = 10 V Tmb = 100 ˚C; VGS = 10 V Tmb = 25 ˚C Tmb = 25 ˚C MIN. - 55 MAX. 500 500 ± 30 3.4 2.2 14 83 150 UNIT V V V A A A W ˚C December 1998 1 Rev 1.200 Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated AVALANCHE ENERGY LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER EAS Non-repetitive avalanche energy CONDITIONS PHP3N50E, PHB3N50E MIN. - MAX. 212 UNIT mJ EAR IAS, IAR Unclamped inductive load, IAS = 2.1 A; tp = 0.31 ms; Tj prior to avalanche = 25˚C; VDD ≤ 50 V; RGS = 50 Ω; VGS = 10 V; refer to fig:17 Repetitive avalanche energy1 IAR = 3.4 A; tp = 2.5 µs; Tj prior to avalanche = 25˚C; RGS = 50 Ω; VGS = 10 V; refer to fig:18 Repetitive and non-repetitive avalanche current - 5.5 3.4 mJ A THERMAL RESISTANCES SYMBOL PARAMETER Rth j-mb Rth j-a Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS MIN. SOT78 package, in free air SOT404 package, pcb mounted, minimum footprint TYP. MAX. UNIT 60 50 1.5 K/W K/W K/W 1 pulse width and repetition rate limited by Tj max. December 1998 2 Rev 1.200 Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated ELECTRICAL CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER Drain-source breakdown voltage ∆V(BR)DSS / Drain-source breakdown ∆Tj voltage temperature coefficient RDS(ON) Drain-source on resistance VGS(TO) Gate threshold voltage Forward transconductance gfs IDSS Drain-source leakage current IGSS Qg(tot) Qgs Qgd td(on) tr td(off) tf Ld Ld Ls Ciss Coss Crss V(BR)DSS CONDITIONS VGS = 0 V; ID = 0.25 mA VDS = VGS; ID = 0.25 mA PHP3N50E, PHB3N50E MIN. 500 2.0 1 - TYP. MAX. UNIT 0.1 2.5 3.0 2 1 30 10 26 2 13 10 29 66 32 3.5 4.5 7.5 310 50 28 3 4.0 25 250 200 30 3 17 V %/K Ω V S µA µA nA nC nC nC ns ns ns ns nH nH nH pF pF pF VGS = 10 V; ID = 1.7 A VDS = VGS; ID = 0.25 mA VDS = 30 V; ID = 1.7 A VDS = 500 V; VGS = 0 V VDS = 400 V; VGS = 0 V; Tj = 125 ˚C Gate-source leakage current VGS = ±30 V; VDS = 0 V Total gate charge Gate-source charge Gate-drain (Miller) charge Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal drain inductance Internal source inductance Input capacitance Output capacitance Feedback capacitance ID = 3.4 A; VDD = 400 V; VGS = 10 V VDD = 250 V; RD = 68 Ω; RG = 18 Ω Measured from tab to centre of die Measured from drain lead to centre of die (SOT78 package only) Measured from source lead to source bond pad VGS = 0 V; VDS = 25 V; f = 1 MHz SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER IS ISM VSD trr Qrr Continuous source current (body diode) Pulsed source current (body diode) Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS Tmb = 25˚C Tmb = 25˚C IS = 3.4 A; VGS = 0 V IS = 3.4 A; VGS = 0 V; dI/dt = 100 A/µs MIN. TYP. MAX. UNIT 370 2.7 3.4 14 1.2 A A V ns µC December 1998 3 Rev 1.200 Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated PHP3N50E, PHB3N50E 120 110 100 90 80 70 60 50 40 30 20 10 0 PD% Normalised Power Derating 10 Zth j-mb, Transient thermal impedance (K/W) PHP2N60 1 D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 single pulse P D tp t D= p T t 100ms 1s T 0 20 40 60 80 100 Tmb / C 120 140 0.001 1us 10us 100us 1ms 10ms tp, pulse width (s) Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Tmb) ID% Normalised Current Derating Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T ID, Drain current (Amps) Tj = 25 C 7 6 5 5.5 V 4 3 2 1 5V VGS = 4.5 V 7V 10 V 6V PHP3N50 120 110 100 90 80 70 60.


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