5120 x 8-BIT x 2 LINE MEMORY (FIFO)
MITSUBISHI MITSUBISHI 〈DIGITAL 〈DIGITAL ASSP ASSP 〉 〉
M66257FP M66257FP
5120 × 8-BIT 2 LINE MEMORY (FIFO) 5120 × 8-BIT ...
Description
MITSUBISHI MITSUBISHI 〈DIGITAL 〈DIGITAL ASSP ASSP 〉 〉
M66257FP M66257FP
5120 × 8-BIT 2 LINE MEMORY (FIFO) 5120 × 8-BIT × 2×LINE MEMORY (FIFO)
DESCRIPTION The M66257FP is a high-speed line memory with a FIFO (First In First Out) structure of 5120-word × 8-bit double configuration which uses high-performance silicon gate CMOS process technology. It allows simultaneous output of 1-line delay data and 2-line delay data, and is most suitable for data correction over multiple lines. It has separate clock, enable and reset signals for write and read, and is most suitable as a buffer memory between devices with different data processing throughput. FEATURES Memory configuration of 5120 words × 8 bits × 2 (dynamic memory) High-speed cycle ............................................. 25ns (Min.) High-speed access ......................................... 18ns (Max.) Output hold ........................................................ 3ns (Min.) Fully independent, asynchronous write and read operations Output .................................................................... 3 states Q00 to Q07 ........................................................ 1-line delay Q10 to Q17 ........................................................ 2-line delay APPLICATION Digital photocopiers, high-speed facsimile, laser beam printers.
PIN CONFIGURATION (TOP VIEW)
GND
1
36
VCC READ ENABLE INPUT READ RESET INPUT READ CLOCK INPUT WRITE ENABLE INPUT WRITE RESET INPUT WRITE CLOCK IN...
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