M66222FP

MITSUBISHI MITSUBISHI 〈DIGITAL 〈DIGITAL ASSP ASSP 〉 〉 M66222SP/FP M66222SP/FP × 8-BIT 2 MAIL-BOX 128128 × 8-BIT × 2× MAIL-BOX DESCRIPTION The M66222 is a mail box that incorporates two complete CMOS shared memory cells of 128 × 8-bit configuration using highperformance silicon gate CMOS process technology, and are equipped with two access ports of A and B. Access ports A and B are equipped with independent addresses CS, WE and OE control pins and I/O pins to allow independent and asynchronous read/write operations individually. This product exclusively performs a write operation from A port and a read operation from B port for one memory, and a read operation from A port and a write operation from B port for the other memory. PIN CONFIGURATION (Top view) CHIP SELECT CSA → INPUT WRITE ENABLE WEA → INPUT NC OUTPUT ENABLE OEA → INPUT  A 0A →   A 1A →   A 2A →  A PORT  A3A → ADDRESS  INPUT  A 4A →   A 5A →   A 6A →   A 7A →  I/O0A ↔   I/O1A ↔   I/O2A ↔  ↔ A PORT  I/O3A DATA I/O  ↔ 4 A I/O    I/O5A ↔   I/O6A ↔   I/O7A ↔ GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 VCC CHIP SELECT 41 ← CSB INPUT 40 ← WEB WRITE ENABLE INPUT NC 39 OUTPUT ENABLE 38 ← OEB INPUT 37 ← A0B   36 ← A1B   35 ← A2B   34 ← A3B  B PORT  ADDRESS 33 ← A4B  INPUT  32 ← A5B   31 ← A6B   30 ← A7B  29 ↔ I/O7B   28 ↔ I/O6B   27 ↔ I/O5B   26 ↔ I/O4B  B PORT  DATA I/O 25 ↔ I/O3B   24 ↔ I/O2B   23 ↔ I/O1B   22 ↔ I/O0B  FEATURES ...