M5M564R16DJ-15

1998.6.18 Ver.A MITSUBISHI LSIs PRELIMINARY Notice: This is not a final specification. Some parametric limits are subject to change. M5M564R16DJ,TP-10,-12,-15 1048576-BIT (65536-WORD BY 16-BIT) CMOS STATIC RAM DESCRIPTION The M5M564R16D is a family of 65536-word by 16-bit static RAMs, fabricated with the high performance CMOS process and designed for high speed application. These devices operate on a single 3.3V supply, and are directly TTL compatible. They include a power down feature as well. In write and read cycles, the lower and upper bytes are able to be controled either togethe or separately by LB and UB. ADDRESS INPUTS CHIP SELECT INPUTS DATA INPUTS/ OUTPUTS PIN CONFIGURATION (TOP VIEW) FEATURES Fast access time M5M564R16DJ,TP-10 ... 10ns(max) M5M564R16DJ,TP-12 ... 12ns(max) M5M564R16DJ,TP-15 ... 15ns(max) Low power dissipation Active .................. 363mW(typ) Single +3.3V power supply Fully static operation : No clocks, No refresh Common data I/O Easy memory expansion by S Three-state outputs : OR-tie capability OE prevents data contention in the I/O bus Directly TTL compatible : All inputs and outputs Separate control of lower and upper bytes by LB and UB A0 A1 A2 A3 A4 S DQ1 DQ2 DQ3 DQ4 1 2 3 4 5 6 44 43 42 41 40 39 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 (3.3V) VCC (0V) GND DATA INPUTS/ OUTPUTS WRITE CONTROL INPUT ADDRESS INPUTS A15 A14 ADDRESS INPUTS A13 OUTPUT OE INPUT ENABLE UB BYTE...