4194304-BIT (4194304-WORD BY 1-BIT) CMOS STATIC RAM
MITSUBISHI LSIs
M5M54R01J-12,-15
1997.11.20 Rev.F
4194304-BIT (4194304-WORD BY 1-BIT) CMOS STATIC RAM
DESCRIPTION The ...
Description
MITSUBISHI LSIs
M5M54R01J-12,-15
1997.11.20 Rev.F
4194304-BIT (4194304-WORD BY 1-BIT) CMOS STATIC RAM
DESCRIPTION The M5M54R01J is a family of 4194304-word by 1-bit static RAMs, fabricated with the high performance CMOS silicon gate process and designed for high speed application. The M5M54R01J is offered in a 32-pin plastic small outline Jlead package(SOJ). These device operate on a single 5V supply, and are directly TTL compatible. They include a power down feature as well. address inputs chip select input PIN CONFIGURATION (TOP VIEW)
FEATURES
Fast access time M5M54R01J-12 12ns(max) M5M54R01J-15 15ns(max) Low power dissipation Active 450mW(typ) Stand by 5mW(typ) Single +5V power supply Fully static operation : No clocks, No refresh Test mode is available Easy memory expansion by S Three-state outputs : OR-tie capability OE prevents data contention in the I/O bus Directly TTL compatible : All inputs and outputs
A0 A1 A2 A3 A4 A5 S
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
(5V) VCC (0V) GND
data inputs write control input address inputs
D W A6 A7 A8 A9 A10
A21 A20 address A19 inputs A18 A17 A16 output enable OE input GND (0V) VCC (5V) data outputs Q A15 A14 address A13 inputs A12 A11 control B1/B4 byte input
M5M54R01J
Outline
32P0K(SOJ)
APPLICATION
High-speed memory units
PACKAGE
32pin 400mil SOJ
BLOCK DIAGRAM
A0 A1 A2
address inputs
3 4 5 6
ROW INPUT BUFFERS
A3 A...
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