64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
Description
MITSUBISHI LSIs SDRAM (Rev.1.3) Mar98
M5M4V64S20ATP-8A,-8L,-8, -10L, -10
64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
Some of contents are subject to change without notice.
DESCRIPTION
The M5M4V64S20ATP is a 4-bank x 4194304-word x 4-bit Synchronous DRAM, with LVTTL interface. All inputs and outputs are referenced to the rising edge of CLK. The M5...
