M5M44800CTP-7S

M5M44800CJ,TP-5,-6,-7, M5M44800CJ,TP-5,-6,-7,-5S,-6S,-7S -5S,-6S,-7S FAST FAST PAGE PAGE MODE MODE 4194304-BIT 4194304-BIT (524288-WORD (524288-WORD BYBY 8-BIT) 8-BIT) DYNAMIC DYNAMIC RAM RAM DESCRIPTION This is a family of 524288-word by 8-bit dynamic RAMs, fabricated with the high performance CMOS process, and is ideal for largecapacity memory systems where high speed, low power dissipation, and low costs are essential. The use of double-layer metalization process technology and a single-transistor dynamic storage stacked capacitor cell provide high circuit density at reduced costs. Multiplexed address inputs permit both a reduction in pins and an increase in system densities. Self or extended refresh current is low enough for battery back-up application. MITSUBISHI LSIs MITSUBISHI LSIs PIN CONFIGURATION (TOP VIEW) (5V)VCC 1 DQ1 2 DQ2 3 DQ3 4 DQ4 5 NC 6 W 7 9 RAS 8 A9 28 VSS(0V) 27 DQ8 26 DQ7 25 DQ6 24 DQ5 23 CAS 22 OE 21 NC 20 A8 19 A7 18 A6 17 A5 16 A4 15 VSS(0V) FEATURES Type name M5M44800CXX-5,-5S M5M44800CXX-6,-6S M5M44800CXX-7,-7S RAS CAS Address OE Cycle Power access access access access time dissipation time time time time (max.ns) (max.ns) (max.ns) (max.ns) (min.ns) (typ.mW) A0 10 A1 11 A2 12 A3 13 (5V)VCC 14 50 60 70 13 15 20 25 30 35 13 15 20 90 110 130 450 375 325 XX=J,TP Outline 28P0K(400mil SOJ) Standard 28pin SOJ, 28pin TSOP (II) Single 5V±10% supply Low stand-by power dissipation CMOS lnput level 5.5mW (Max) CMOS Input level 550µW (Max) * Oper...