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M29F200BT Dataheets PDF



Part Number M29F200BT
Manufacturers ST Microelectronics
Logo ST Microelectronics
Description 2 Mbit 256Kb x8 or 128Kb x16 / Boot Block Single Supply Flash Memory
Datasheet M29F200BT DatasheetM29F200BT Datasheet (PDF)

M29F200BT M29F200BB 2 Mbit (256Kb x8 or 128Kb x16, Boot Block) Single Supply Flash Memory PRELIMINARY DATA s SINGLE 5V±10% SUPPLY VOLTAGE for PROGRAM, ERASE and READ OPERATIONS ACCESS TIME: 45ns PROGRAMMING TIME – 8µs per Byte/Word typical 7 MEMORY BLOCKS – 1 Boot Block (Top or Bottom Location) – 2 Parameter and 4 Main Blocks 1 44 s s s s PROGRAM/ERASE CONTROLLER – Embedded Byte/Word Program algorithm – Embedded Multi-Block/Chip Erase algorithm – Status Register Polling and Toggle Bits – Re.

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M29F200BT M29F200BB 2 Mbit (256Kb x8 or 128Kb x16, Boot Block) Single Supply Flash Memory PRELIMINARY DATA s SINGLE 5V±10% SUPPLY VOLTAGE for PROGRAM, ERASE and READ OPERATIONS ACCESS TIME: 45ns PROGRAMMING TIME – 8µs per Byte/Word typical 7 MEMORY BLOCKS – 1 Boot Block (Top or Bottom Location) – 2 Parameter and 4 Main Blocks 1 44 s s s s PROGRAM/ERASE CONTROLLER – Embedded Byte/Word Program algorithm – Embedded Multi-Block/Chip Erase algorithm – Status Register Polling and Toggle Bits – Ready/Busy Output Pin TSOP48 (N) 12 x 20mm SO44 (M) s ERASE SUSPEND and RESUME MODES – Read and Program another Block during Erase Suspend Figure 1. Logic Diagram s UNLOCK BYPASS PROGRAM COMMAND – Faster Production/Batch Programming TEMPORARY BLOCK UNPROTECTION MODE LOW POWER CONSUMPTION – Standby and Automatic Standby 100,000 PROGRAM/ERASE CYCLES per BLOCK 20 YEARS DATA RETENTION – Defectivity below 1 ppm/year ELECTRONIC SIGNATURE – Manufacturer Code: 0020h – M29F200BT Device Code: 00D3h – M29F200BB Device Code: 00D4h A0-A16 W E G RP VCC s 17 15 DQ0-DQ14 DQ15A–1 M29F200BT M29F200BB BYTE RB s s s s VSS AI02912 October 1999 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/22 M29F200BT, M29F200BB Figure 2A. TSOP Connections A15 A14 A13 A12 A11 A10 A9 A8 NC NC W RP NC NC RB NC NC A7 A6 A5 A4 A3 A2 A1 1 48 A16 BYTE VSS DQ15A–1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 G VSS E A0 Figure 2B. SO Connections 12 13 M29F200BT M29F200BB 37 36 NC RB NC A7 A6 A5 A4 A3 A2 A1 A0 E VSS G DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11 1 44 2 43 3 42 4 41 5 40 6 39 7 38 8 37 9 36 10 35 11 M29F200BT 34 12 M29F200BB 33 13 32 14 31 15 30 16 29 17 28 18 27 19 26 20 25 24 21 22 23 AI02914 RP W A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE VSS DQ15A–1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC 24 25 AI02913 Table 1. Signal Names A0-A16 DQ0-DQ7 DQ8-DQ14 DQ15A–1 E G W RP RB BYTE VCC VSS NC 2/22 Address Inputs Data Inputs/Outputs Data Inputs/Outputs Data Input/Output or Address Input Chip Enable Output Enable Write Enable Reset/Block Temporary Unprotect Ready/Busy Output Byte/Word Organization Select Supply Voltage Ground Not Connected Internally SUMMARY DESCRIPTION The M29F200B is a 2 Mbit (256Kb x8 or 128Kb x16) non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single 5V supply. On power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or EPROM. The M29F200B is fully backward compatible with the M29F200. The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Each block can be protected independently to prevent accidental Program or Erase commands from modifying the memory. Program and Erase commands are written to the Command Interface of the memory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents. The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards. M29F200BT, M29F200BB Table 2. Absolute Maximum Ratings (1) Symbol Parameter Ambient Operating Temperature (Temperature Range Option 1) TA Ambient Operating Temperature (Temperature Range Option 6) Ambient Operating Temperature (Temperature Range Option 3) TBIAS TSTG VIO (2) VCC VID Temperature Under Bias Storage Temperature Input or Output Voltage Supply Voltage Identification Voltage Value 0 to 70 –40 to 85 –40 to 125 –50 to 125 –65 to 150 –0.6 to 6 –0.6 to 6 –0.6 to 13.5 Unit °C °C °C °C °C V V V Note: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. 2. Minimum Voltage may undershoot to –2V during transition and for less than 20ns during transitions. The blocks in the memory are asymmetrically arranged, see Tables 3A and 3B, Block Addresses. The first or last 64 Kbytes have been divided into four additional blocks. The 16 Kbyte Boot Block can be used for small initialization code to start the microprocessor, the two 8 Kbyte Parameter Blocks can be used for parameter storage and the remaining 32K is a small Main Block where the application may be stored. Chip Enable, Output Enable and Write Enable signals control the bus operation of the memory. They allow simple connectio.


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