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MC100LVEL90

ON Semiconductor

Triple ECL to PECL Translator

MC100LVEL90 -3.3 V / -5 V Triple ECL Input to LVPECL Output Translator Description The MC100LVEL90 is a triple ECL to L...


ON Semiconductor

MC100LVEL90

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Description
MC100LVEL90 -3.3 V / -5 V Triple ECL Input to LVPECL Output Translator Description The MC100LVEL90 is a triple ECL to LVPECL translator. The device receives either −3.3 V or −5 V differential ECL signals, determined by the VEE supply level, and translates them to +3.3 V differential LVPECL output signals. To accomplish the level translation, the LVEL90 requires three power rails. The VCC supply should be connected to the positive supply, and the VEE pin should be connected to the negative power supply. The GND pins, as expected, are connected to the system ground plane. Both VEE and VCC should be bypassed to ground via 0.01 mF capacitors. Under open input conditions, the D input will be biased at VEE/2 and the D input will be pulled to VEE. This condition will force the Q output to a LOW, ensuring stability. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. Features 500 ps Propagation Delays ESD Protection: > 2 kV HBM, > 200 V MM The 100 Series Contains Temperature Compensation Operating Range: VCC = 3.0 V to 3.8 V; VEE = −3.0V to −5.5 V; GND = 0 V Internal Input Pulldown Resistors Q Output will Default LOW with Inputs Open or at...




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