LS7031

LSI/CSI UL ® LS7031 (631) 271-0400 FAX (631) 271-0405 December 2002 CONNECTION DIAGRAM - TOP VIEW SCAN RESET INPUT MSD STROBE 8 ST R O BE 7 ST R O BE 6 ST R O BE 5 DIGIT STROBE OUTPUTS ST R O BE 4 ST R O BE 3 ST R O BE 2 LSD STROBE 1 DECIMAL POINT INPUT BLANK OUTPUT 1 2 3 4 5 6 7 8 9 10 11 LS7031 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 OSC. INPUT SCAN INPUT N.C. B1/D1 B2/D1 N.C. B4/D1 B8/D1 N.C. B1/D2 B2/D2 B4/D2 B8/D2 V SS V GG N.C. N.C. V DD RESET COUNTER INPUT LOAD LATCH INPUT INPUT TO DECADE 2 LATCH INPUT TO DECADE 1 LATCH LSI LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 A3800 6 DECADE MOS UP COUNTER WITH 8 DECADE LATCH AND MULTIPLEXER FEATURES: DC to 7.5 MHz Count Frequency Multiplexed BCD Outputs DC to 500kHz Scan Frequency +4.75V to +15V Operation (VDD-VSS) Compatible with CMOS Logic High Input Noise Immunity Ability to Latch External BCD Data in the two LSD Positions Leading Zero Blanking with Decimal Point and Overflow Controls All inputs protected Low Power Dissipation 40 Pin DIP - See Figure 1 DESCRIPTION: The LS7031 is a monolithic, ion implanted MOS, 6 decade up counter. The circuit includes latches, a multiplexer, leading zero blanking and BCD data outputs. CLOCK GENERATOR The clock for the six decade counter (digit positions 3-8) is formed from the internal ‘OR’ combination of B4/D2 and B8/D2 if LS7031 is used with external prescaling counters. When operated in this fashion the maximum allowa...