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LC6522H Dataheets PDF



Part Number LC6522H
Manufacturers Sanyo
Logo Sanyo
Description Single-Chip 4-Bit Microcomputers
Datasheet LC6522H DatasheetLC6522H Datasheet (PDF)

Ordering number: EN2076D No. 2076D CMOS LSI LC6520C, 6522C, LC6520H, 6522H Single-Chip 4-Bit Microcomputers for Medium/Large-Scale Control-Oriented Applications The LC6520C/H are single-chip 4-bit microcomputers that contain a 4K-byte ROM, 1 K-bit RAM, have 42 pins, and are fabricated using CMOS process technology. Besides 8 input/output common ports of 32 pins and an input port of 4 pins, the LC6520C/H have specific ports that are used to provide the interrupt function, 4-bit/8-bit serial in.

  LC6522H   LC6522H


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Ordering number: EN2076D No. 2076D CMOS LSI LC6520C, 6522C, LC6520H, 6522H Single-Chip 4-Bit Microcomputers for Medium/Large-Scale Control-Oriented Applications The LC6520C/H are single-chip 4-bit microcomputers that contain a 4K-byte ROM, 1 K-bit RAM, have 42 pins, and are fabricated using CMOS process technology. Besides 8 input/output common ports of 32 pins and an input port of 4 pins, the LC6520C/H have specific ports that are used to provide the interrupt function, 4-bit/8-bit serial input/output function, and burst pulse output function. All output ports are of the open drain type with a withstand voltage of 15 V and a drive current of 20 mA and have the option of containing a pull-up resistance bitwise. The LC6520C/H are the same as our LC6500 series in the basic architecture of the CPU and the instruction set, but are made more powerful in the stack level and the cycle time. The LC6522C/H are the same as the LC6520C/H, except that they contain a 2k-byte ROM, 512-bit RAM. Features • Instruction set with 80 instructions {Common to the LC6500 series) • ROM/RAM : 4096 bytes/1024 bits (LC6520C/H) : 2048 bytes/512 bits < LC6522C/H) • Instruction cycle time: 6/is (C version, VQD = 3 to 5.5V) 2.77 Ms (C version, V Q D ~ 4 to 5.5V) 9.92 MS (H version, V Q D = 4.5 to 5.5V) • Serial input/output interface x 1 (4 bits/8 bits program-selectable) • I/O ports Input port: 4 pins Input/output common ports: 32 pins Input* input/output withstand voltage: 15 V max (all input* input/output ports) Output current: 20 mA max (all output ports) Pull-up resistance: May be contained bitwise by option. (All output ports) Output level during reset: For ports C, D, output (H or L) during reset may be specified portwise by option. Package Dimensions 3025B-D42SIC (unit: mm) <>? n n n n 22 rfTr jjwJ yuuu u u u U ^i—i~r rai ,||,>. ocr.»n FB3 - 48 4,7 t& 45 «4J 1 UV PCO - 2 10 39X37 3356 -PJ1 -PJO PCI - 3 34 — PI3 PC2 - 4 PCS - S NTCOOTO1 --6a7 LLCC665 25 22 0 31-PI2 3372 10 29 -PI1 --PN1C0 -PG3 PDZ - 9 P03 - 10 30 27 — — PG2 PG1 PBD rei - 11 13U 14 IS W >7 It 19 3011 36 35 22 23 --PwGyOifiT b, Pin Name When mounting the QIP version on the board, do not dip it in solder. Nothing must be connected to NC pin. OSC1, OSC2: RC, ceramic resonator, or X'tal for OSC INT: Interrupt RES: Reset PAO-3 Input/output common port PBO-3 Input port PCO-3 PDO-3 PEO-3 PFO-3 Input/output common port PGO-3 PIO-3: PJO-3: SCK: SO: Serial Input/output port SI: TEST: Test No. 2076-2/29 LC6520C ,6520H,6522C ,6522H Pin Description Pin Name Pins I/O Functions Options During Reset VDD vss 0SC1 OSC2 PA0 PAi PA2 PA3 PB0 PBi PB2 PB3 PCo PCI PC2 PC3 1 Power supply 1 1 Input • Pin for externally connecting R, (1) External clock input C o r a ceramic resonator for (2) 2-pin RCOSC 1 Output system clock generation • For the external clock mode, the OSC2 pin is open. (3) 2-pin ceramic resonator OSC (4) Predivider option 1. No. predivider 2. 1/3 predivider 3. 1/4 predivider 4 Input/output • I nput/output common port Ao to (1) Open drain type 3- 4-bit input {IP instruction) 4-bit output (OP instruction) Single-bit decision (BP, BNP instructions) output (2) With pull-up resistance (1), (2): Specified bit by bit. Single-bit set/reset (SPB, RPB instructions) • Standby is controlled by the PA3 (or PAo to 3 ) . • The PA3 (or PAo to 3) pin must be free from chattering during the HALT instruction execution cycle. • " H " output (Output Nch transistor OFF) 4 Input • Input Port Bo to 3 4-bit input (IP instruction) Single-bit decision (BP, BNP instructions) 4 Input/output • Input/output common port Co.


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