K4D263238A

K4D263238A-GC 128M DDR SDRAM 128Mbit DDR SDRAM 1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL (144-Ball FBGA) Revision 2.0 January 2003 Samsung Electronics reserves the right to change products or specification without notice. - 1 - Rev. 2.0 (Jan. 2003) K4D263238A-GC Revision History Revision 2.0 (January 16, 2002) Changed package ball height from 0.25mm to 0.35mm Typo corrected 128M DDR SDRAM Revision 1.9 (July 18, 2002) Changed power dissipation from 2.0W to 2.3W Revision 1.8 (June 12, 2002) Supported both CL4 and CL3 for the K4D263238A-GC45 and the effective date of this change starts from WW23 Revision 1.6 (January 30, 2002) Changed tCK(max) of K4D263238A-GC40 from 7ns to 10ns. Changed tCK(max) of K4D263238A-GC33/36 from 5ns to 4ns. For all the CL5 operation, guaranteed tCK(max) is 4ns. Revision 1.5 (December 14, 2001) Removed K4D26323RA-GC2A/33/36(VDD/VDDQ=2.8V) & K4D263238A-GC55/60 from the spec. Added K4D263238A-GC36(VDD/VDDQ=2.5V) Revision 1.4 (November 14, 2001) Added K4D26323RA-GC36(VDD/VDDQ=2.8V) Revision 1.3 (October 22, 2001) Corrected part number of K4D263238A-GC2A to K4D26323RA-GC2A Changed tCDLR of -GC2A and GC33 from 3tCK to 2tCK and applied since Sept 15, 2001. Defined x32 DDR for mobile PC graphics separately - K4D26323AA-GL** featured with VDDQ=1.8V,ICC6=1mA with reduced operating current. Refer to the K4D26323AA-GL** spec for more detail information. Revision 1.2 (Septe...