M50LPW041

M50LPW041 4 Mbit (512Kb x8, Uniform Block) 3V Supply Low Pin Count Flash Memory PRELIMINARY DATA s SUPPLY VOLTAGE – VCC = 3V to 3.6V for Program, Erase and Read Operations s – VPP = 12V for Fast Program and Fast Erase LOW PIN COUNT (LPC) – Standard Interface for embedded operation with PC Chipsets that are without automapping memory features PLCC32 (K) s ADDRESS/ADDRESS MULTIPLEXED – A/A Mux Interface for programming equipment compatibility s LOW PIN COUNT (LPC) HARDWARE INTERFACE MODE – 5 Signal Communication Interface supporting Read and Write Operations – Hardware Write Protect Pins for Block Protection – Register Based Read and Write Protection – 5 Additional General Purpose Inputs for platform design flexibility – Synchronized with 33MHz PCI clock 4 ID0-ID3 5 GPI0GPI4 LFRAME CLK IC RP INIT TSOP40 (N) 10 x 20mm Figure 1. Logic Diagram (LPC Interface) VCC VPP 4 LAD0LAD3 WP TBL s BYTE PROGRAMMING TIME – Single Byte Mode: 10µs (typical) – Quadruple Byte Mode: 2.5µs (typical) s s 8 UNIFORM 64 Kbyte MEMORY BLOCKS PROGRAM/ERASE CONTROLLER – Embedded Byte Program and Block/Chip Erase algorithms – Status Register Bits M50LPW041 s PROGRAM and ERASE SUSPEND – Read other Blocks during Program/Erase Suspend – Program other Blocks during Erase Suspend s s FOR USE in PC BIOS APPLICATIONS ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Device Code: 3Ch VSS AI05785 September 2002 This is preliminary information on a new product now in development or undergoing evaluati...