EDL1216CASA

DATA SHEET 128M bits Mobile RAM EDL1216CASA (8M words × 16 bits) Description The EDL1216CA is a 128M bits Mobile RAM organized as 2,097,152 words × 16 bits × 4 banks. The Mobile RAM achieved low power consumption and high-speed data transfer using the pipeline architecture. All inputs and outputs are synchronized with the positive edge of the clock. This product is packaged in 54-ball FBGA (µBGA). Pin Configurations /xxx indicates active low signal. 54-ball FBGA ( BGA) 1 A VSS DQ15 VSSQ VDDQ DQ0 VDD 2 3 4 5 6 7 8 9 B Features Low voltage power supply  VDD: 1.8V ± 0.15V  VDDQ: 1.8V ± 0.15V Wide temperature range (−25°C to 85°C) Programmable partial self refresh Programmable driver strength Programmable temperature compensated self refresh (Option) Deep power down mode Small package (54-ball FBGA (µBGA)) Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge Pulsed interface Possible to assert random column address in every cycle Quad internal banks controlled by BA0 and BA1 Byte control by LDQM and UDQM Wrap sequence = Sequential/ Interleave /CAS latency (CL) = 2, 3 Automatic precharge and controlled precharge Auto refresh and self refresh ×16 organization 4,096 refresh cycles/64ms Burst termination by Burst stop command and Precharge command FBGA(µBGA) package is lead free solder (Sn-Ag-Cu) C DQ14 DQ13 VDDQ VSSQ DQ2 DQ1 DQ12 DQ11 VSSQ VDDQ DQ4 DQ3 D DQ10 DQ9 VDDQ VSSQ DQ6 DQ5 E DQ8 N...