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HYM64V8005GU-60 Dataheets PDF



Part Number HYM64V8005GU-60
Manufacturers Siemens
Logo Siemens
Description 3.3V 8M x 64-Bit EDO-DRAM Module 3.3V 8M x 72-Bit EDO-DRAM Module
Datasheet HYM64V8005GU-60 DatasheetHYM64V8005GU-60 Datasheet (PDF)

3.3V 8M × 64-Bit EDO-DRAM Module 3.3V 8M x 72-Bit EDO-DRAM Module 168pin unbuffered DIMM Module with serial presence detect HYM64V8005GU-50/-60 HYM64V8045GU-50/-60 HYM72V8005GU-50/-60 HYM72V8045GU-50/-60 • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-Line Memory Module for PC main memory applications 1 bank 8M x 64, 8M x 72 in 4k and 8k refresh organisation Optimized for byte-write non-parity or ECC applications Extended Data Out (EDO) Performance: -50 tRAC tCAC tAA tRC tHPC RAS Access T.

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3.3V 8M × 64-Bit EDO-DRAM Module 3.3V 8M x 72-Bit EDO-DRAM Module 168pin unbuffered DIMM Module with serial presence detect HYM64V8005GU-50/-60 HYM64V8045GU-50/-60 HYM72V8005GU-50/-60 HYM72V8045GU-50/-60 • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-Line Memory Module for PC main memory applications 1 bank 8M x 64, 8M x 72 in 4k and 8k refresh organisation Optimized for byte-write non-parity or ECC applications Extended Data Out (EDO) Performance: -50 tRAC tCAC tAA tRC tHPC RAS Access Time CAS Access Time Access Time from Address Cycle Time EDO Mode Cycle Time 50 ns 13 ns 25 ns 84 ns 20 ns -60 60 ns 15 ns 30 ns 104 ns 25 ns • • • • • • • • • • • • • • • Single +3.3 V ± 0.3 V Power Supply CAS-before-RAS refresh, RAS-only-refresh Decoupling capacitors mounted on substrate All inputs, outputs and clocks are fully LV-TTL compatible Serial presence detects (optional) Utilizes 8M × 8 -DRAMs in TSOPII packages 4096 refresh cycles / 64 ms with 12 / 11 addressing (Row / Column) for HYM64/72V8005GU 8192 refresh cycles / 128 ms with 13 / 10 addressing (Row / Column) for HYM64/72V8045GU Gold contact pad Card Size: 133,35mm x 25,40 mm x 4,00 mm This DRAM product module family is intended to be fully pin and architecture compatible with the 168pin unbuffered SDRAM DIMM module family Semiconductor Group 1 2.97 HYM 64(72)V8005/45GU-50/-60 8M x 64/72 DRAM Module The HYM64(72)V2005/45GU-50/-60 are industry standard 168-pin 8-byte Dual In-Line Memory Modules (DIMMs) which are organized as 8M x 64 and 8M x 72 high speed memory arrays designed with EDO DRAMs for non-parity and ECC applications. 4k refresh with 12 / 11 addressing and 8k refresh modules with 13 / 10 addressing are available.The DIMMs use eight 8M x 8 EDO DRAMs for the 8M x 64 organisation and nine 8M x 8 DRAMs for the 8M x 72 organisation, both in TSOPII packages. Decoupling capacitors are mounted on the PC board. The DIMMs use optional serial presence detects implemented via a serial E 2PROM using the two pin I2C protocol. The first 128 bytes are utilized by the DIMM manufacturer and the second 128 bytes of serial PD data are available to the customer. All 168-pin DIMMs provide a high performance, flexible 8-byte interface in a 133,35 mm long spacesaving footprint. Ordering Information Type 4k-Refresh: HYM 64V8005GU-50 HYM 64V8005GU-60 HYM 72V8005GU-50 HYM 72V8005GU-60 8k-Refresh: HYM 64V8045GU-50 HYM 64V8045GU-60 HYM 72V8045GU-50 HYM 72V8045GU-60 L-DIM-168-13 L-DIM-168-13 L-DIM-168-13 L-DIM-168-13 8M x 64 DRAM module (access time 50 ns) 8M x 64 DRAM module (access time 60 ns) 8M x 72 DRAM module (access time 50 ns) 8M x 72 DRAM module (access time 60 ns) Q67100-Q2188 Q67100-Q2189 L-DIM-168-13 L-DIM-168-13 L-DIM-168-13 L-DIM-168-13 8M x 64 DRAM module (access time 50 ns) 8M x 64 DRAM module (access time 60 ns) 8M x 72 DRAM module (access time 50 ns) 8M x 72 DRAM module (access time 60 ns) Ordering Code Package Descriptions Semiconductor Group 2 HYM 64(72)V8005/45GU-50/-60 8M x 6.


HYM64V8005GU-50 HYM64V8005GU-60 HYM64V8045GU-50


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