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HYB514256BJ-70 Dataheets PDF



Part Number HYB514256BJ-70
Manufacturers Siemens
Logo Siemens
Description 256 K x 4-Bit Dynamic RAM Low Power 256 K x 4-Bit Dynamic RAM
Datasheet HYB514256BJ-70 DatasheetHYB514256BJ-70 Datasheet (PDF)

256 K × 4-Bit Dynamic RAM Low Power 256 K × 4-Bit Dynamic RAM HYB 514256B/BJ-50/-60/-70 HYB 514256BL/BJL-50/-60/-70 Advanced Information 262 144 words by 4-bit organization • Fast access and cycle time 50 ns access time 95 ns cycle time (-50 version) 60 ns access time 110 ns cycle time (-60 version) 70 ns access time 130 ns cycle time (-70 version) • Fast page mode cycle time 35 ns (-50 version) 40 ns (-60 version) 45 ns (-70 version) • Low power dissipation max. 495 mW active (-50 version) ma.

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256 K × 4-Bit Dynamic RAM Low Power 256 K × 4-Bit Dynamic RAM HYB 514256B/BJ-50/-60/-70 HYB 514256BL/BJL-50/-60/-70 Advanced Information 262 144 words by 4-bit organization • Fast access and cycle time 50 ns access time 95 ns cycle time (-50 version) 60 ns access time 110 ns cycle time (-60 version) 70 ns access time 130 ns cycle time (-70 version) • Fast page mode cycle time 35 ns (-50 version) 40 ns (-60 version) 45 ns (-70 version) • Low power dissipation max. 495 mW active (-50 version) max. 440 mW active (-60 version) max. 385 mW active (-70 version) max. 5.5 mW standby max. 1.1 mW standby for L-version • • • • • • • Single + 5 V (± 10 %) supply with a built-in VBB generator Output unlatched at cycle end allows twodimensional chip selection Read-modify-write, CAS-before-RAS refresh, RAS-only refresh, hidden-refresh and fast page mode capability All inputs, outputs and clocks TTL-compatible 512 refresh cycles/8 ms 512 refresh cycles/64 ms for L-version only Plastic Packages: P-DIP-20-2, P-SOJ-26/20-1 Ordering Information Type HYB 514256B-50 HYB 514256B-60 HYB 514256B-70 HYB 514256BJ-50 HYB 514256BJ-60 HYB 514256BJ-70 HYB 514256BL-50 HYB 514256BL-60 HYB 514256BL-70 HYB 514256BJL-50 HYB 514256BJL-60 HYB 514256BJL-70 Ordering Code Q67100-Q1044 Q67100-Q530 Q67100-Q433 Q67100-Q1054 Q67100-Q536 Q67100-Q537 on request Q67100-Q542 Q67100-Q543 on request Q67100-Q608 Q67100-Q607 Package P-DIP-20-2 P-DIP-20-2 P-DIP-20-2 P-SOJ-26/20-1 P-SOJ-26/20-1 P-SOJ-26/20-1 P-DIP-20-2 P-DIP-20-2 P-DIP-20-2 P-SOJ-26/20-1 P-SOJ-26/20-1 P-SOJ-26/20-1 Description DRAM (access time 50ns) DRAM (access time 60 ns) DRAM (access time 70 ns) DRAM (access time 50 ns) DRAM (access time 60 ns) DRAM (access time 70 ns) DRAM (access time 50 ns) DRAM (access time 60 ns) DRAM (access time 70 ns) DRAM (access time 50 ns) DRAM (access time 60 ns) DRAM (access time 70 ns) Semiconductor Group 55 01.95 HYB 514256B/BL/BJ/BJL-50/-60/-70 256 K × 4-DRAM The HYB 514256B/BJ/BL/BJL is the new generation dynamic RAM organized as 262 144 words by 4-bit. The HYB 514256B/BJ/BL/BJL utilizes CMOS silicon gate process technology as well as advanced circuit techniques to provide wide operating margins, both internally and for the system user. Multiplexed address inputs permit the HYB 514256B/BJ/BL/BJL to be packaged in a standard plastic P-DIP-20-2,or plastic P-SOJ-26/20-1. This package size provides high system bit densities and is compatible with commonly used automatic testing and insertion equipment. System oriented features include single + 5 V (± 10 %) power supply, direct interfacing with high-performance logic device families such as Schottky TTL. These HYB 514256BL/BJL are specially selected for battery backup applications. Pin Definitions and Functions Pin No. A0-A8 RAS OE I/O1-I/O4 CAS WE Function Address Inputs Row Address Strobe Output Enable Data Input/Output Column Address Strobe Read/Write Input Power Supply (+ 5 V) Ground (0 V) No Connection VCC VSS N.C. Semiconductor Group 56 HYB 514256B/BL/BJ/BJL-50/-60/-70 256 K × 4-DRAM Pin Configuration (top view) P-SOJ-26/20-1 P-DIP-20-2 Semiconductor Group 57 HYB 514256B/BL/BJ/BJL-50/-60/-70 256 K × 4-DRAM Block Diagram Semiconductor Group 58 HYB 514256B/BL/BJ/BJL-50/-60/-70 256 K × 4-DRAM Absolute Maximum Ratings Operating temperature range .........................................................................................0 to + 70 ˚C Storage temperature range......................................................................................– 55 to + 150 ˚C Soldering temperature ............................................................................................................260 ˚C Soldering time .............................................................................................................................10 s Input/output voltage ........................................................................................................ – 1 to + 7 V Power supply voltage...................................................................................................... – 1 to + 7 V Power dissipation..................................................................................................................... 0.6 W Data out current (short circuit) ................................................................................................ 50 mA Note: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage of the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC Characteristics TA = 0 to 70 ˚C; VSS = 0 V; VCC = 5 V ± 10 % Parameter Input high voltage Input low voltage Output high voltage (IOUT = – 5 mA) Output low voltage (IOUT = 4.2 mA) Input leakage current, any input (0 V ≤ VIN ≤ 6.5 V, all other pins = 0 V) Output leakage current (DO is disabled, 0 V ≤ VOUT ≤ VCC) Average VCC supply current: -50 version -60 version -70 version (RAS, CAS, address cy.


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