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AM29LV081B Dataheets PDF



Part Number AM29LV081B
Manufacturers AMD
Logo AMD
Description 8 Megabit (1 M x 8-Bit) CMOS 3.0 Volt-only Sector Erase Flash Memory
Datasheet AM29LV081B DatasheetAM29LV081B Datasheet (PDF)

ADVANCE INFORMATION Am29LV081B 8 Megabit (1 M x 8-Bit) CMOS 3.0 Volt-only Sector Erase Flash Memory DISTINCTIVE CHARACTERISTICS s Optimized architecture for Miniature Card and mass storage applications s Single power supply operation — Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications — Regulated voltage range: 3.0 to 3.6 volt read and write operations and for compatibility with high performance 3.3 volt microprocessors s Manufactured on 0.35 µm proc.

  AM29LV081B   AM29LV081B


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ADVANCE INFORMATION Am29LV081B 8 Megabit (1 M x 8-Bit) CMOS 3.0 Volt-only Sector Erase Flash Memory DISTINCTIVE CHARACTERISTICS s Optimized architecture for Miniature Card and mass storage applications s Single power supply operation — Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications — Regulated voltage range: 3.0 to 3.6 volt read and write operations and for compatibility with high performance 3.3 volt microprocessors s Manufactured on 0.35 µm process technology — Compatible with 0.5 µm Am29LV081 device s High performance — Full voltage range: access times as fast as 80 ns — Regulated voltage range: access times as fast as 70 ns s Ultra low power consumption (typical values at 5 MHz) — 200 nA Automatic Sleep mode current — 200 nA standby mode current — 7 mA read current — 15 mA program/erase current s Flexible sector architecture — Sixteen 64 Kbyte sectors — Supports full chip erase — Sector Protection features: A hardware method of locking a sector to prevent any program or erase operations within that sector Sectors can be locked in-system or via programming equipment Temporary Sector Unprotect feature allows code changes in previously locked sectors s Unlock Bypass Program Command — Reduces overall programming time when issuing multiple program command sequences s Embedded Algorithms — Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors — Embedded Program algorithm automatically writes and verifies data at specified addresses s Minimum 1,000,000 write cycle guarantee per sector s Package option — 40-pin TSOP s Compatibility with JEDEC standards — Pinout and software compatible with singlepower supply Flash — Superior inadvertent write protection s Data# Polling and toggle bits — Provides a software method of detecting program or erase operation completion s Ready/Busy# pin (RY/BY#) — Provides a hardware method of detecting program or erase cycle completion s Erase Suspend/Erase Resume — Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation s Hardware reset pin (RESET#) — Hardware method to reset the device to reading array data This document contains information on a product under development at Advanced Micro Devices. The information is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed product without notice. Publication# 21525 Rev: A Amendment/0 Issue Date: January 1998 Refer to AMD’s Website (www.amd.com) for the latest information. A D V A N C E I N F O R M A T I O N GENERAL DESCRIPTION The Am29LV081B is an 8 Mbit, 3.0 volt-only Flash memory organized as 1,048,576 bytes. The device is offered in a 40-pin TSOP package. The byte-wide (x8) data appears on DQ7–DQ0. This device requires only a single, 3.0 volt VCC supply to perform read, program, and erase operations. A standard EPROM programmer can also be used to program and erase the device. This device is manufactured using AMD’s 0.35 µ m process technology, and offers all the features and benefits of the Am29LV081, which was manufactured using 0 . 5 µ m p r o c e s s t e c h n o l o gy. I n a d d i t i o n , t h e Am29LV081B features unlock bypass programming and in-system sector protection/unprotection. The standard device offers access times of 70, 80, 90, and 120 ns, allowing high speed microprocessors to operate without wait states. To eliminate bus contention the device has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls. The device requires only a single 3.0 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations. The device is entirely command set compatible with the JEDEC single-power-supply Flash standard. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine that controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from other Flash or EPROM devices. Device programming occurs by executing the program command sequence. This initiates the Embedded Program algorithm—an internal algorithm that automatically times the program pulse widths and verifies proper cell margin. The Unlock Bypass mode facilitates faster programming times by requiring only two write cycles to program data instead of four. Device erasure occurs by executing the erase command sequence. This initiates the Embedded Erase algorithm—an internal algorithm that automatically preprograms the array (if it is not already programmed) before executing the erase operation. During erase, the device automatically times the erase pulse widths and verifies proper ce.


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