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TDA4916GG Dataheets PDF



Part Number TDA4916GG
Manufacturers Siemens Semiconductor
Logo Siemens Semiconductor
Description SMPS-IC with MOSFET Driver Output
Datasheet TDA4916GG DatasheetTDA4916GG Datasheet (PDF)

SMPS-IC with MOSFET Driver Output TDA 4916 GG Features • • • • High clock frequency Low current drain High reference accuracy All monitoring functions P-DSO-24-1 Type TDA 4916 GG Ordering Code Q67000-A9230 Package P-DSO-24-1 Functional Description and Application The general-purpose single-ended switch-mode power supply device for the direct control of SIPMOS power transistors incorporates both digital and analog functions. These are required for the construction of high-quality flyback, .

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SMPS-IC with MOSFET Driver Output TDA 4916 GG Features • • • • High clock frequency Low current drain High reference accuracy All monitoring functions P-DSO-24-1 Type TDA 4916 GG Ordering Code Q67000-A9230 Package P-DSO-24-1 Functional Description and Application The general-purpose single-ended switch-mode power supply device for the direct control of SIPMOS power transistors incorporates both digital and analog functions. These are required for the construction of high-quality flyback, forward and choke converters. The device can be likewise used for transformer-less voltage multipliers and variable-speed motors. Faults occurring during operation of the switch-mode power supply are detected by comparators integrated in the device which initiate protective functions. In addition, pairs of power supplies can be synchronized in antiphase. In-phase or antiphase synchronization is possible when more than two power supplies are involved. Semiconductor Group 1 05.96 TDA 4916 GG Pin Configuration (top view) P-DSO-24-1 Figure 1 Semiconductor Group 2 05.96 TDA 4916 GG Pin Definitions and Functions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Symbol 0V GND Function GND Supply voltage Ground QSIP SIPMOS driver Supply voltage driver Series feed Current sensor negative input Current sensor K5 Current turn-OFF K6 Output K6 Pulse omission Soft start Input synchronization Output synchronization Frequency generator Frequency generator Ramp generator Input undervoltage Input overvoltage Input K1 Output operational amplifier Input operational amplifier Input operational amplifier Reference voltage VS 0V QSIP Q SIP VS QSIP SF – I K5/– I K6 + I K5 + I K6 Q K6 PO CSS I SYN Q SYN RT CT CR I K4 I K3 I K1 Q OP – I OP + I OP VREF Semiconductor Group 3 05.96 TDA 4916 GG Figure 2 Block Diagram Semiconductor Group 4 05.96 TDA 4916 GG Circuit Description The individual functional sections of the device and their interactions are described below. Power Supply at VS The device does not enable the output until the turn-ON threshold of VS is exceeded. The duty factor (active time/period) can then rise from zero to the value set with K1 in the time determined by the soft start. The turn-OFF threshold lies below the turn-ON threshold. Below the turn-OFF threshold the output Q SIP is reliably low. Frequency Generator The frequency is mainly determined by close-tolerance external components and the calibrated reference voltage. The switching frequency at the output can be set by suitable choice of Rt and Ct. The maximum possible duty factor can be reduced by a defined amount by means of a resistor from CT to 0V GND. The maximum possible duty factor can be increased by a defined amount by means of a resistor from CT to VS. Ramp Generator The ramp generator is controlled by the frequency generator and operates with the same frequency. Capacitor Cr on the ramp generator is discharged by an internally-set current and charged via a current set externally. The duration of the falling edge of the ramp generator output must be shorter than its rise time. Only then do the upper and lower switching levels of the ramp generator signal have their nominal values. In “voltage mode control” operation, the rising edge of the ramp generator signal is compared with an externally set dc voltage in comparator K1 for pulse-width control at the output. The slope of the rising edge is set by the current through Rr. The voltage source connected to Rr can be the SMPS input voltage. This makes it possible to control the duty factor for a constant volt-second product at the output. This control option (precontrol) permits equalization of known disturbances (e.g. input voltage ripple). Superimposed load current control (current mode control) can also be implemented. For this purpose the actual current at the source of the SIPMOS transistor is sensed and compared with the specified value in comparator K5. Semiconductor Group 5 05.96 TDA 4916 GG Comparator K1 (duty factor setting for voltage mode control) The two plus inputs of the comparator are so connected that the lower plus level is always compared with the minus input level. As soon as the voltage of the rising edge of the sawtooth (minus input) exceeds the lower of the two plus input levels, the output is inhibited via the turn-OFF Flip-Flop, that is to say the High time of the output can be continuously varied. Since the frequency remains constant, this corresponds to a duty factor change. Comparator K2 The comparator has a switching threshold at 1.5 V. Its output sets the fault Flip-Flop when the voltage on capacitor Ca lies below 1.5 V. However, the fault Flip-Flop accepts the setting pulse only if no reset pulse (fault) is applied. This prevents resetting of the output as long as a fault signal is present. Comparators K3 (overvoltage), K4 (undervoltage), VS Undervoltage, VREF Overcurrent These are fault detectors which cause the output to be inhibited.


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