D-Type Flip-Flop
CMOS Digital Integrated Circuits Silicon Monolithic
TC7WH74FK
TC7WH74FK
1. Functional Description
• D-Type Flip Flop w...
Description
CMOS Digital Integrated Circuits Silicon Monolithic
TC7WH74FK
TC7WH74FK
1. Functional Description
D-Type Flip Flop with Preset and Clear
2. Features
(1) AEC-Q100 (Rev. H) (Note 1) (2) Wide operating temperature range: Topr = -40 to 125 (Note 2) (3) High speed operation: fMAX = 170 MHz (typ.) (VCC = 5.0 V) (4) Low power dissipation: ICC = 2.0 µA (max) (Ta = 25 ) (5) High noise immunity: VNIH = VNIL = 28 % VCC (min) (6) 5.5 V tolerant inputs (7) Balanced propagation delays: tPLH ≈ tPHL (8) Wide operating voltage range: VCC = 2.0 to 5.5 V
Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales representative.
Note 2: For devices with the ordering part number ending in J(CT. Topr = -40 to 85 for the other devices.
3. Packaging
US8
©2016 Toshiba Corporation
1
Start of commercial production
1994-07
2017-04-13 Rev.3.0
4. Marking and Pin Assignment
TC7WH74FK
Marking
5. IEC Logic Symbol
Pin Assignment (Top view)
6. Truth Table
X: Don't care
©2016 Toshiba Corporation
2
2017-04-13 Rev.3.0
TC7WH74FK
7. Absolute Maximum Ratings (Note) (Unless otherwise specified, Ta = 25 )
Characteristics
Symbol
Note
Rating
Unit
Supply voltage
VCC
-0.5 to 7.0
V
Input voltage
VIN
-0.5 to 7.0
DC output voltage
VOUT
-0.5 to VCC + 0.5
Input diode current
IIK
-20
mA
Output diode current
IOK
(Note 1)
±20
DC output current
IOUT
±25
VCC/ground current
ICC
±50
Power dissipation
PD
200
mW
Stora...
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