TC74VHC74FT

TC74VHC74F/FN/FT/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC74F,TC74VHC74FN,TC74VHC74FT,TC74VHC74FK Dual D-Type Flip-Flop with Preset and Clear The TC74VHC74 is an advanced high speed CMOS D-FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The signal level applied to the D INPUT is transferred to Q OUTPUT during the positive going transition of the CK pulse. CLR and PR are independent of the CK and are accomplished by setting the appropriate input low. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. Features High speed: fmax = 170 MHz (typ.) at VCC = 5 V Low power dissipation: ICC = 2 μA (max) at Ta = 25°C High noise immunity: VNIH = VNIL = 28% VCC (min) Power down protection is provided on all inputs. Balanced propagation delays: tpLH ∼− tpHL Wide operating voltage range: VCC (opr) = 2 V to 5.5 V Pin and function compatible with 74ALS74 Note: The JEDEC SOP (FN) is not available in Japan. TC74VHC74F TC74VHC74FN TC74VHC74FT TC74VHC74FK Weight SOP14-P-300-1.27A SOL14-P-150-1.27 TSSOP14-P-0044-0.65A VSSOP14-P-0030-0.50 : 0.18 g (typ.) : 0....