Octal buffer/line driver
INTEGRATED CIRCUITS
74LV240 Octal buffer/line driver; inverting (3-State)
Product specification Supersedes data of 1997...
Description
INTEGRATED CIRCUITS
74LV240 Octal buffer/line driver; inverting (3-State)
Product specification Supersedes data of 1997 Feb 19 IC24 Data Handbook 1998 May 20
Philips Semiconductors
Philips Semiconductors
Product specification
Octal buffer/line driver; inverting (3-State)
74LV240
FEATURES
Wide operating voltage: 1.0 to 5.5 V Optimized for low voltage applications: 1.0 to 3.6 V Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, Output capability: bus driver ICC category: MSI
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns SYMBOL tPHL/tPLH CI CPD PARAMETER Propagation delay 1An to 1Yn; 2An to 2Yn Input capacitance Power dissipation capacitance per buffer Tamb = 25°C Tamb = 25°C
DESCRIPTION
The 74LV240 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT240. The 74LV240 is an octal inverting buffer/line driver with 3-State outputs. The 3-State outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high impedance OFF-state. The 74LV240 is identical to the 74LV244 but has inverting outputs.
CONDITIONS CL = 15 pF; VCC = 3.3 V
TYPICAL 9.0 3.5
UNIT ns pF pF
VCC = 3.3 V VI = GND to VCC1
30
NOTE: 1. CPD is used to determine the dynamic power dissipation (PD in µW) VCC2 fi )ȍ (CL VCC2 fo) where: PD = CPD fi = input frequency in MHz; ...
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