74LS153

DM74LS153 Dual 1-of-4 Line Data Selectors/Multiplexers August 1986 Revised March 2000 DM74LS153 Dual 1-of-4 Line Data Selectors/Multiplexers General Description Each of these data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection to the AND-OR-invert gates. Separate strobe inputs are provided for each of the two four-line sections. Features s Permits multiplexing from N lines to 1 line s Performs at parallel-to-serial conversion s Strobe (enable) line provided for cascading (N lines to n lines) s High fan-out, low impedance, totem pole outputs s Typical average propagation delay times From data From strobe From select 14 ns 19 ns 22 ns s Typical power dissipation 31 mW Ordering Code: Order Number DM74LS153M DM74LS153N Package Number M16A N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Select Inputs B X L L L L H H H H A X L L H H L L H H C0 X L H X X X X X X Data Inputs C1 X X X L H X X X X C2 X X X X X L H X X C3 X X X X X X X L H Strobe G H L L L L L L L L Output Y L L H L H L H L H Select inputs A and B are common to both sections. H = HIGH Level L = LOW Level X = Don't Care © 2000 Fairchild Semiconductor Corporation DS006393 www...