74LS132

DM74LS132 Quad 2-Input NAND Gate with Schmitt Trigger Input August 1986 Revised March 2000 DM74LS132 Quad 2-Input NAND Gate with Schmitt Trigger Input General Description This device contains four independent gates each of which performs the logic NAND function. Each input has hysteresis which increases the noise immunity and transforms a slowly changing input signal to a fast changing, jitter free output. Ordering Code: Order Number DM74LS132M DM74LS132SJ DM74LS132N Package Number M14A M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Y = AB Inputs A L L H H H = HIGH Logic Level L = LOW Logic Level Output B L H L H Y H H H L © 2000 Fairchild Semiconductor Corporation DS006389 www.fairchildsemi.com DM74LS132 Absolute Maximum Ratings(Note 1) Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range 7V 7V 0°C to +70°C −65°C to +150°C Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the “Electrical Characteristics” table are not guaranteed at the absolute maximum ...