AMD-8131BLC

24637 Rev 3.02 - August 10, 2004 AMD-8131TM PCI-X Tunnel Data Sheet AMD-8131TM HyperTransportTM PCI-X Tunnel Data Sheet 1 Overview Cover page The AMD-8131TM HyperTransportTM PCI-XTunnel (referred to as the IC in this document) is a HyperTransport™ technology (referred to as link in this document) tunnel developed by AMD that provides two PCI-X bridges. 1.1 Device Features HyperTransport technology tunnel with side A and side B. Side A is 16 bits (input and output); side B is 8 bits. Either side may connect to the host or to a downstream HyperTransport technology compliant device. Each side supports HyperTransport technology-defined reduced bit widths: 8-bit, 4-bit, and 2-bit. Each side supports transfer rates of 1600, 1200, 800, and 400 mega-transfers per second. Maximum bandwidth is 6.4 gigabytes per second across side A (half upstream and half downstream) and 3.2 gigabytes per second across side B. Independent transfer rate and bit width selection for each side. Link disconnect protocol supported. Two PCI-X (rev. 1.0) bridges: bridge A and bridge B. Each bridge supports a 64-bit data bus. Each bridge supports operational modes of PCI-X and legacy PCI revision 2.2 protocol. Bridges support 133, 100, and 66 MHz transfer rates in PCI-X mode. Bridges support 66 and 33 MHz transfer rates in PCI mode. Independent transfer rates and operational modes for each bridge. Each bridge includes support for up to 5 PCI masters with clock, request, and ...