ZVP3306

P-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET ISSUE 2 – MARCH 94 FEATURES * 60 Volt VDS * RDS(on)=14Ω ZVP3306A D G S ABSOLUTE MAXIMUM RATINGS. PARAMETER Drain-Source Voltage Continuous Drain Current at Tamb=25°C Pulsed Drain Current Gate Source Voltage Power Dissipation at Tamb=25°C Operating and Storage Temperature Range SYMBOL VDS ID IDM VGS Ptot Tj:Tstg -60 E-Line TO92 Compatible VALUE -160 -1.6 ± 20 UNIT V mA A V mW °C 625 -55 to +150 ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated). PARAMETER Drain-Source Breakdown Voltage Gate-Source Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Current(1) SYMBOL MIN. BVDSS VGS(th) IGSS IDSS ID(on) -400 14 60 50 25 8 8 8 8 8 -60 -1.5 -3.5 20 -0.5 -50 MAX. UNIT CONDITIONS. V V nA µA µA ID=-1mA, VGS=0V ID=-1mA, VDS= VGS VGS=± 20V, VDS=0V VDS=-60 V, VGS=0 VDS=-48 V, VGS=0V, T=125°C(2) VDS=-18 V, VGS=-10V VGS=-10V,ID=-200mA VDS=-18V,ID=-200mA mA Ω Static Drain-Source On-State RDS(on) Resistance (1) Forward Transconductance (1)(2) Input Capacitance (2) Common Source Output Capacitance (2) Reverse Transfer Capacitance (2) Turn-On Delay Time (2)(3) Rise Time (2)(3) Turn-Off Delay Time (2)(3) Fall Time (2)(3) gfs Ciss Coss Crss td(on) tr td(off) tf mS pF pF pF ns ns ns ns VDS=-18V, VGS=0V, f=1MHz VDD ≈ -18V, ID=-200mA (1) Measured under pulsed conditions. Width=300µs. Duty cycle ≤2% (2) Sample test. 3-429 Switching times measured with 50Ω source impedance and <5ns rise time o...