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W83194BR-730 Dataheets PDF



Part Number W83194BR-730
Manufacturers Winbond
Logo Winbond
Description 166MHZ CLOCK
Datasheet W83194BR-730 DatasheetW83194BR-730 Datasheet (PDF)

W83194BR-730 166MHZ CLOCK FOR SIS CHIPSET 1.0 GENERAL DESCRIPTION The W83194BR-730 is a Clock Synthesizer which provides all clocks required for high-speed RISC or CISC microprocessor such as AMD K7. W83194BR-730 provides 64 CPU/PCI frequencies which are selectable with smooth transitions by hardware or software. W83194BR-730 also provides 13 SDRAM clocks. The W83194BR-730 provides step-less frequency programming by controlling the VCO freq. and the programmable PCI clock output divisor ratio. A.

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W83194BR-730 166MHZ CLOCK FOR SIS CHIPSET 1.0 GENERAL DESCRIPTION The W83194BR-730 is a Clock Synthesizer which provides all clocks required for high-speed RISC or CISC microprocessor such as AMD K7. W83194BR-730 provides 64 CPU/PCI frequencies which are selectable with smooth transitions by hardware or software. W83194BR-730 also provides 13 SDRAM clocks. The W83194BR-730 provides step-less frequency programming by controlling the VCO freq. and the programmable PCI clock output divisor ratio. A watch dog timer is quipped and when time out, the RESET# pin will output 4ms pulse signal. The W83194BR-730 accepts a 14.318 MHz reference crystal as its input. Spread spectrum built in at 0~-0.5% or ±0.25% to reduce EMI. Programmable stopping individual clock outputs and frequency 2 selection through I C interface. The device meets the Pentium power-up stabilization, which requires CPU and PCI clocks be stable within 2 ms after power-up. Using dual function pin for the slots(ISA, PCI, CPU, DIMM) is not recommend. 2.0 PRODUCT FEATURES • • • • • • • • • • • • • • • • • • Supports AMD CPU with I C. 3 CPU clocks (one free-running CPU clock) 13 SDRAM clocks for 3 DIMMs 6 PCI synchronous clocks 2 AGP clocks 2 REF clocks as 14.318MHz outputs < 250ps skew among CPU and SDRAM clocks < 250ps skew among PCI clocks Skew from CPU(earlier) to PCI clock 1 to 4ns, center 2.6ns. Smooth frequency switch with selections from 66 MHz to 200 MHz CPU Stepless frequency programming by controlling the VCO freq. and the clock output divisor ratio Programmable skew for CPU to SDRAM and CPU to AGP clock outputs 2 2 I C 2-Wire serial interface and I C read back ±0.25% or 0~-0.5% spread spectrum function to reduce EMI Programmable registers to enable/stop each output and select modes MODE pin for power Management and RESET# out when system hang One 48 MHz for USB & one 24_48 MHz for super I/O 48-pin SSOP package 2 -1- Publication Release Date: Oct. 2000 Revision 0.60 W83194BR-730 PRELIMINARY 3.0 PIN CONFIGURATION VddR REF1^/ &AGPSEL REF0^/ &FS3 Vss Xin Xout VddP PCICLK0^/ &FS1 PCICLK1^/ &FS2 PCICLK2^ PCICLK3^ PCICLK4^ PCICLK5/RESET$ Vss VddAGP AGPCLK0/SEL24#_48* AGPCLK1/Mode1* Vss Vss 48MHz/&FS0 24_48MHz/&Mode Vdd48 SDATA* SDCLK* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 VddLCPU CPUC0$ CPUT0$ CPUCS_C1$ Vss VddSD SDRAM 0 SDRAM 1 SDRAM 2 Vss SDRAM 3 SDRAM 4 SDRAM 5 VddSD SDRAM 6 SDRAM 7 Vss SDRAM 8/PD# SDRAM 9/SDRAM_STOP# VssSD SDRAM 10/PCI_STOP# SDRAM11/CPU_STOP# SDRAM12 VddSD * : 120K pull-up &: 120K pull-down ^ : 2X driving stength $ : Open-drain #: Active LOW 4.0 PIN DESCRIPTION IN - Input OUT - Output I/O - Bi-directional Pin # - Active Low * - Internal 250kΩ pull-up 4.1 Crystal I/O SYMBOL Xin Xout PIN 5 6 I/O IN OUT FUNCTION Crystal input with internal loading capacitors and feedback resistors. Crystal output at 14.318MHz nominally. -2- Publication Release Date:Oct. 2000 Revision.


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